mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-23 15:32:33 +00:00
c1023c8075
Backport required DT changes from commit dabdd123c9
.
Significantly improves stability and performance for MT76x2 and MT7603
Signed-off-by: Felix Fietkau <nbd@nbd.name>
120 lines
1.8 KiB
Plaintext
120 lines
1.8 KiB
Plaintext
/dts-v1/;
|
|
|
|
#include "mt7620a.dtsi"
|
|
|
|
#include <dt-bindings/input/input.h>
|
|
|
|
/ {
|
|
compatible = "PSG1218", "ralink,mt7620a-soc";
|
|
model = "Phicomm PSG1218";
|
|
|
|
gpio-leds {
|
|
compatible = "gpio-leds";
|
|
|
|
blue {
|
|
label = "psg1218:blue:status";
|
|
gpios = <&gpio0 10 1>;
|
|
};
|
|
|
|
yellow {
|
|
label = "psg1218:yellow:status";
|
|
gpios = <&gpio0 11 1>;
|
|
};
|
|
|
|
red {
|
|
label = "psg1218:red:status";
|
|
gpios = <&gpio0 8 0>;
|
|
};
|
|
};
|
|
|
|
gpio-keys-polled {
|
|
compatible = "gpio-keys-polled";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
poll-interval = <20>;
|
|
|
|
reset {
|
|
label = "reset";
|
|
gpios = <&gpio0 1 1>;
|
|
linux,code = <KEY_RESTART>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&gpio0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&spi0 {
|
|
status = "okay";
|
|
|
|
m25p80@0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "jedec,spi-nor";
|
|
reg = <0>;
|
|
spi-max-frequency = <10000000>;
|
|
|
|
partition@0 {
|
|
label = "u-boot";
|
|
reg = <0x0 0x30000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@20000 {
|
|
label = "u-boot-env";
|
|
reg = <0x30000 0x10000>;
|
|
read-only;
|
|
};
|
|
|
|
factory: partition@30000 {
|
|
label = "factory";
|
|
reg = <0x40000 0x10000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@40000 {
|
|
label = "firmware";
|
|
reg = <0x50000 0x7b0000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pinctrl {
|
|
state_default: pinctrl0 {
|
|
gpio {
|
|
ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "ephy", "wled", "nd_sd";
|
|
ralink,function = "gpio";
|
|
};
|
|
|
|
pa {
|
|
ralink,group = "pa";
|
|
ralink,function = "pa";
|
|
};
|
|
};
|
|
};
|
|
|
|
ðernet {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&ephy_pins>;
|
|
mtd-mac-address = <&factory 0x28>;
|
|
mediatek,portmap = "llllw";
|
|
};
|
|
|
|
&pcie {
|
|
status = "okay";
|
|
|
|
pcie-bridge {
|
|
mt76@0,0 {
|
|
reg = <0x0000 0 0 0 0>;
|
|
device_type = "pci";
|
|
mediatek,mtd-eeprom = <&factory 0x8000>;
|
|
ieee80211-freq-limit = <5000000 6000000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&wmac {
|
|
ralink,mtd-eeprom = <&factory 0>;
|
|
};
|