openwrt/target/linux/pistachio/patches-4.9/412-mtd-nand-Add-JEDEC-manufacturer-ID-for-Gigadevice.patch
Ian Pozella 52c17bff3c pistachio: add 4.9 kernel support
This adds kernel support for the Pistachio SoC and the Marduk (Ci40)
board which uses it.

Much of the code for Pistachio has been upstreamed however some
patches are still required to boot from the Marduk board:
 * spi bug fixes
 * dma bug fixes
 * pistachio internal clock tree bug fixes
 * spi-nand implementation
 * dts based mtd device naming scheme
 * dts backports and bug fixes

Signed-off-by: Abhijit Mahajani <Abhijit.Mahajani@imgtec.com>
Signed-off-by: Francois Berder <francois.berder@imgtec.com>
Signed-off-by: Ian Pozella <Ian.Pozella@imgtec.com>
2017-03-22 11:43:22 +01:00

43 lines
1.4 KiB
Diff

From a4bc33b205fd9b1db862f1e45173dba57b0fa57f Mon Sep 17 00:00:00 2001
From: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Date: Sat, 25 Feb 2017 15:43:09 +0000
Subject: mtd: nand: Add JEDEC manufacturer ID for Gigadevice
This commit adds Gigadevice to the list of manufacturer ID and name strings.
(picked from http://lists.infradead.org/pipermail/linux-mtd/2014-December/056765.html)
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
---
drivers/mtd/nand/nand_ids.c | 1 +
include/linux/mtd/nand.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c
index 2af9869..dc80fcd 100644
--- a/drivers/mtd/nand/nand_ids.c
+++ b/drivers/mtd/nand/nand_ids.c
@@ -182,6 +182,7 @@ struct nand_manufacturers nand_manuf_ids[] = {
{NAND_MFR_SANDISK, "SanDisk"},
{NAND_MFR_INTEL, "Intel"},
{NAND_MFR_ATO, "ATO"},
+ {NAND_MFR_GIGADEVICE, "Gigadevice"},
{0x0, "Unknown"}
};
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index d8905a2..3a00df7 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -928,6 +928,7 @@ static inline void nand_set_controller_data(struct nand_chip *chip, void *priv)
#define NAND_MFR_SANDISK 0x45
#define NAND_MFR_INTEL 0x89
#define NAND_MFR_ATO 0x9b
+#define NAND_MFR_GIGADEVICE 0xc8
/* The maximum expected count of bytes in the NAND ID sequence */
#define NAND_MAX_ID_LEN 8
--
2.7.4