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ca4469045f
Replace downstream RealTek PHY patches with backported ones. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
210 lines
6.6 KiB
Diff
210 lines
6.6 KiB
Diff
From deb8af5243504e379878ae3f9a091b21422d65b2 Mon Sep 17 00:00:00 2001
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From: Alexander Couzens <lynxis@fe80.eu>
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Date: Tue, 9 Apr 2024 09:30:11 +0200
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Subject: [PATCH] net: phy: realtek: configure SerDes mode for rtl822xb PHYs
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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The rtl8221b and rtl8226b series support switching SerDes mode between
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2500base-x and sgmii based on the negotiated copper speed.
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Configure this switching mode according to SerDes modes supported by
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host.
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There is an additional datasheet for RTL8226B/RTL8221B called
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"SERDES MODE SETTING FLOW APPLICATION NOTE" where a sequence is
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described to setup interface and rate adapter mode.
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However, there is no documentation about the meaning of registers
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and bits, it's literally just magic numbers and pseudo-code.
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Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
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[ refactored, dropped HiSGMII mode and changed commit message ]
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Signed-off-by: Marek Behún <kabel@kernel.org>
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[ changed rtl822x_update_interface() to use vendor register ]
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[ always fill in possible interfaces ]
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[ only apply to rtl8221b and rtl8226b phy's ]
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[ set phydev->rate_matching in .config_init() ]
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Signed-off-by: Eric Woudstra <ericwouds@gmail.com>
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Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Reviewed-by: should come before them, without any blank lines. As the
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/phy/realtek.c | 114 ++++++++++++++++++++++++++++++++++++--
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1 file changed, 110 insertions(+), 4 deletions(-)
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--- a/drivers/net/phy/realtek.c
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+++ b/drivers/net/phy/realtek.c
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@@ -54,6 +54,16 @@
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RTL8201F_ISR_LINK)
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#define RTL8201F_IER 0x13
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+#define RTL822X_VND1_SERDES_OPTION 0x697a
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+#define RTL822X_VND1_SERDES_OPTION_MODE_MASK GENMASK(5, 0)
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+#define RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX_SGMII 0
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+#define RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX 2
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+
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+#define RTL822X_VND1_SERDES_CTRL3 0x7580
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+#define RTL822X_VND1_SERDES_CTRL3_MODE_MASK GENMASK(5, 0)
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+#define RTL822X_VND1_SERDES_CTRL3_MODE_SGMII 0x02
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+#define RTL822X_VND1_SERDES_CTRL3_MODE_2500BASEX 0x16
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+
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#define RTL8366RB_POWER_SAVE 0x15
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#define RTL8366RB_POWER_SAVE_ON BIT(12)
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@@ -659,6 +669,63 @@ static int rtl822x_write_mmd(struct phy_
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return ret;
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}
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+static int rtl822xb_config_init(struct phy_device *phydev)
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+{
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+ bool has_2500, has_sgmii;
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+ u16 mode;
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+ int ret;
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+
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+ has_2500 = test_bit(PHY_INTERFACE_MODE_2500BASEX,
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+ phydev->host_interfaces) ||
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+ phydev->interface == PHY_INTERFACE_MODE_2500BASEX;
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+
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+ has_sgmii = test_bit(PHY_INTERFACE_MODE_SGMII,
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+ phydev->host_interfaces) ||
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+ phydev->interface == PHY_INTERFACE_MODE_SGMII;
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+
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+ /* fill in possible interfaces */
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+ __assign_bit(PHY_INTERFACE_MODE_2500BASEX, phydev->possible_interfaces,
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+ has_2500);
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+ __assign_bit(PHY_INTERFACE_MODE_SGMII, phydev->possible_interfaces,
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+ has_sgmii);
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+
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+ if (!has_2500 && !has_sgmii)
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+ return 0;
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+
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+ /* determine SerDes option mode */
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+ if (has_2500 && !has_sgmii) {
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+ mode = RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX;
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+ phydev->rate_matching = RATE_MATCH_PAUSE;
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+ } else {
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+ mode = RTL822X_VND1_SERDES_OPTION_MODE_2500BASEX_SGMII;
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+ phydev->rate_matching = RATE_MATCH_NONE;
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+ }
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+
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+ /* the following sequence with magic numbers sets up the SerDes
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+ * option mode
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+ */
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+ ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x75f3, 0);
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+ if (ret < 0)
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+ return ret;
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+
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+ ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND1,
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+ RTL822X_VND1_SERDES_OPTION,
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+ RTL822X_VND1_SERDES_OPTION_MODE_MASK,
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+ mode);
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+ if (ret < 0)
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+ return ret;
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+
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+ ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x6a04, 0x0503);
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+ if (ret < 0)
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+ return ret;
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+
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+ ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x6f10, 0xd455);
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+ if (ret < 0)
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+ return ret;
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+
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+ return phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x6f11, 0x8020);
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+}
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+
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static int rtl822x_get_features(struct phy_device *phydev)
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{
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int val;
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@@ -695,6 +762,28 @@ static int rtl822x_config_aneg(struct ph
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return __genphy_config_aneg(phydev, ret);
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}
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+static void rtl822xb_update_interface(struct phy_device *phydev)
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+{
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+ int val;
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+
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+ if (!phydev->link)
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+ return;
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+
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+ /* Change interface according to serdes mode */
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+ val = phy_read_mmd(phydev, MDIO_MMD_VEND1, RTL822X_VND1_SERDES_CTRL3);
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+ if (val < 0)
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+ return;
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+
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+ switch (val & RTL822X_VND1_SERDES_CTRL3_MODE_MASK) {
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+ case RTL822X_VND1_SERDES_CTRL3_MODE_2500BASEX:
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+ phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
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+ break;
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+ case RTL822X_VND1_SERDES_CTRL3_MODE_SGMII:
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+ phydev->interface = PHY_INTERFACE_MODE_SGMII;
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+ break;
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+ }
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+}
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+
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static int rtl822x_read_status(struct phy_device *phydev)
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{
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int ret;
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@@ -716,6 +805,19 @@ static int rtl822x_read_status(struct ph
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return rtlgen_get_speed(phydev);
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}
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+static int rtl822xb_read_status(struct phy_device *phydev)
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+{
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+ int ret;
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+
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+ ret = rtl822x_read_status(phydev);
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+ if (ret < 0)
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+ return ret;
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+
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+ rtl822xb_update_interface(phydev);
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+
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+ return 0;
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+}
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+
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static bool rtlgen_supports_2_5gbps(struct phy_device *phydev)
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{
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int val;
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@@ -988,7 +1090,8 @@ static struct phy_driver realtek_drvs[]
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.name = "RTL8226B_RTL8221B 2.5Gbps PHY",
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.get_features = rtl822x_get_features,
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.config_aneg = rtl822x_config_aneg,
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- .read_status = rtl822x_read_status,
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+ .config_init = rtl822xb_config_init,
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+ .read_status = rtl822xb_read_status,
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.suspend = genphy_suspend,
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.resume = rtlgen_resume,
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.read_page = rtl821x_read_page,
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@@ -1010,7 +1113,8 @@ static struct phy_driver realtek_drvs[]
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.name = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
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.get_features = rtl822x_get_features,
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.config_aneg = rtl822x_config_aneg,
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- .read_status = rtl822x_read_status,
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+ .config_init = rtl822xb_config_init,
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+ .read_status = rtl822xb_read_status,
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.suspend = genphy_suspend,
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.resume = rtlgen_resume,
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.read_page = rtl821x_read_page,
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@@ -1020,7 +1124,8 @@ static struct phy_driver realtek_drvs[]
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.name = "RTL8221B-VB-CG 2.5Gbps PHY",
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.get_features = rtl822x_get_features,
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.config_aneg = rtl822x_config_aneg,
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- .read_status = rtl822x_read_status,
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+ .config_init = rtl822xb_config_init,
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+ .read_status = rtl822xb_read_status,
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.suspend = genphy_suspend,
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.resume = rtlgen_resume,
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.read_page = rtl821x_read_page,
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@@ -1030,7 +1135,8 @@ static struct phy_driver realtek_drvs[]
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.name = "RTL8221B-VM-CG 2.5Gbps PHY",
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.get_features = rtl822x_get_features,
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.config_aneg = rtl822x_config_aneg,
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- .read_status = rtl822x_read_status,
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+ .config_init = rtl822xb_config_init,
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+ .read_status = rtl822xb_read_status,
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.suspend = genphy_suspend,
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.resume = rtlgen_resume,
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.read_page = rtl821x_read_page,
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