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61 lines
2.1 KiB
Diff
61 lines
2.1 KiB
Diff
From 98bfbb0b3f126d93076377fcd9553a493e45e304 Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Wed, 14 Mar 2012 10:45:26 +0100
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Subject: [PATCH 31/47] MIPS: ath79: add AR934X specific glue to ath79_device_reset_{clear,set}
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
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Cc: linux-mips@linux-mips.org
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Cc: mcgrof@infradead.org
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Patchwork: https://patchwork.linux-mips.org/patch/3511/
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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---
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arch/mips/ath79/common.c | 9 ++++++++-
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arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 1 +
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2 files changed, 9 insertions(+), 1 deletions(-)
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--- a/arch/mips/ath79/common.c
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+++ b/arch/mips/ath79/common.c
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@@ -1,9 +1,12 @@
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/*
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* Atheros AR71XX/AR724X/AR913X common routines
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*
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- * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
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+ * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
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+ * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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*
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+ * Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP
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+ *
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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@@ -67,6 +70,8 @@ void ath79_device_reset_set(u32 mask)
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reg = AR913X_RESET_REG_RESET_MODULE;
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else if (soc_is_ar933x())
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reg = AR933X_RESET_REG_RESET_MODULE;
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+ else if (soc_is_ar934x())
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+ reg = AR934X_RESET_REG_RESET_MODULE;
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else
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BUG();
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@@ -91,6 +96,8 @@ void ath79_device_reset_clear(u32 mask)
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reg = AR913X_RESET_REG_RESET_MODULE;
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else if (soc_is_ar933x())
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reg = AR933X_RESET_REG_RESET_MODULE;
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+ else if (soc_is_ar934x())
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+ reg = AR934X_RESET_REG_RESET_MODULE;
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else
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BUG();
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--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
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+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
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@@ -227,6 +227,7 @@
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#define AR933X_RESET_REG_RESET_MODULE 0x1c
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#define AR933X_RESET_REG_BOOTSTRAP 0xac
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+#define AR934X_RESET_REG_RESET_MODULE 0x1c
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#define AR934X_RESET_REG_BOOTSTRAP 0xb0
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#define AR934X_RESET_REG_PCIE_WMAC_INT_STATUS 0xac
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