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135 lines
4.0 KiB
C
135 lines
4.0 KiB
C
#ifndef _ATHRS26_PHY_H
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#define _ATHRS26_PHY_H
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/*****************/
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/* PHY Registers */
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/*****************/
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#define ATHR_PHY_CONTROL 0
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#define ATHR_PHY_STATUS 1
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#define ATHR_PHY_ID1 2
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#define ATHR_PHY_ID2 3
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#define ATHR_AUTONEG_ADVERT 4
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#define ATHR_LINK_PARTNER_ABILITY 5
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#define ATHR_AUTONEG_EXPANSION 6
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#define ATHR_NEXT_PAGE_TRANSMIT 7
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#define ATHR_LINK_PARTNER_NEXT_PAGE 8
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#define ATHR_1000BASET_CONTROL 9
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#define ATHR_1000BASET_STATUS 10
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#define ATHR_PHY_SPEC_CONTROL 16
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#define ATHR_PHY_SPEC_STATUS 17
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#define ATHR_DEBUG_PORT_ADDRESS 29
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#define ATHR_DEBUG_PORT_DATA 30
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/* ATHR_PHY_CONTROL fields */
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#define ATHR_CTRL_SOFTWARE_RESET 0x8000
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#define ATHR_CTRL_SPEED_LSB 0x2000
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#define ATHR_CTRL_AUTONEGOTIATION_ENABLE 0x1000
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#define ATHR_CTRL_RESTART_AUTONEGOTIATION 0x0200
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#define ATHR_CTRL_SPEED_FULL_DUPLEX 0x0100
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#define ATHR_CTRL_SPEED_MSB 0x0040
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#define ATHR_RESET_DONE(phy_control) \
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(((phy_control) & (ATHR_CTRL_SOFTWARE_RESET)) == 0)
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/* Phy status fields */
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#define ATHR_STATUS_AUTO_NEG_DONE 0x0020
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#define ATHR_AUTONEG_DONE(ip_phy_status) \
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(((ip_phy_status) & \
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(ATHR_STATUS_AUTO_NEG_DONE)) == \
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(ATHR_STATUS_AUTO_NEG_DONE))
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/* Link Partner ability */
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#define ATHR_LINK_100BASETX_FULL_DUPLEX 0x0100
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#define ATHR_LINK_100BASETX 0x0080
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#define ATHR_LINK_10BASETX_FULL_DUPLEX 0x0040
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#define ATHR_LINK_10BASETX 0x0020
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/* Advertisement register. */
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#define ATHR_ADVERTISE_NEXT_PAGE 0x8000
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#define ATHR_ADVERTISE_ASYM_PAUSE 0x0800
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#define ATHR_ADVERTISE_PAUSE 0x0400
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#define ATHR_ADVERTISE_100FULL 0x0100
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#define ATHR_ADVERTISE_100HALF 0x0080
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#define ATHR_ADVERTISE_10FULL 0x0040
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#define ATHR_ADVERTISE_10HALF 0x0020
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#define ATHR_ADVERTISE_ALL (ATHR_ADVERTISE_10HALF | ATHR_ADVERTISE_10FULL | \
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ATHR_ADVERTISE_100HALF | ATHR_ADVERTISE_100FULL)
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/* 1000BASET_CONTROL */
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#define ATHR_ADVERTISE_1000FULL 0x0200
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/* Phy Specific status fields */
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#define ATHER_STATUS_LINK_MASK 0xC000
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#define ATHER_STATUS_LINK_SHIFT 14
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#define ATHER_STATUS_FULL_DEPLEX 0x2000
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#define ATHR_STATUS_LINK_PASS 0x0400
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#define ATHR_STATUS_RESOVLED 0x0800
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/*phy debug port register */
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#define ATHER_DEBUG_SERDES_REG 5
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/* Serdes debug fields */
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#define ATHER_SERDES_BEACON 0x0100
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#ifndef BOOL
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#define BOOL int
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#define TRUE 1
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#define FALSE 0
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#endif
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#define sysMsDelay(_x) udelay((_x) * 1000)
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#undef S26_VER_1_0
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#ifdef CFG_ATHRHDR_EN
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#include <net.h>
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#define header_xmit(dev,pkt,len) dev->send(dev,pkt,len) //dev_queue_xmit(skb)
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#define header_recv_ack(dev) dev->recv(dev) //dev_queue_xmit(skb)
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typedef enum {
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NORMAL_PACKET,
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RESERVED0,
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MIB_1ST,
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RESERVED1,
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RESERVED2,
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READ_WRITE_REG,
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READ_WRITE_REG_ACK,
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RESERVED3
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} ATHR_HDR_TYPE;
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typedef struct {
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uint16_t reserved0;
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uint16_t priority;
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uint16_t type ;
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uint16_t broadcast;
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uint16_t from_cpu;
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uint16_t reserved1;
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uint16_t port_num;
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}at_header_t;
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typedef struct {
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uint64_t reg_addr;
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uint64_t reserved0;
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uint64_t cmd_len;
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uint64_t reserved1;
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uint64_t cmd;
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uint64_t reserved2;
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uint64_t seq_num;
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}reg_cmd_t;
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void athrs26_reg_init(void);
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int header_receive_pkt(uchar *pkt);
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void athrs26_reg_dev(struct eth_device *mac);
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#endif
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int athrs26_phy_is_up(int unit);
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int athrs26_phy_is_fdx(int unit);
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int athrs26_phy_speed(int unit);
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BOOL athrs26_phy_setup(int unit);
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#endif /* _ATHRS26_PHY_H */
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