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2402f8a9ee
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 38311
50 lines
1.3 KiB
Diff
50 lines
1.3 KiB
Diff
commit 935e93fcc022ff7be7046d2435ce6441e260abfb
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Author: Hauke Mehrtens <hauke@hauke-m.de>
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Date: Wed Sep 18 13:33:00 2013 +0200
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MIPS: BCM47XX: Fix detected clock on Asus WL520GC and WL520GU
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The Asus WL520GC and WL520GU are based on the BCM5354 and clocked at
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200MHz, but they do not have a clkfreq nvram variable set to the
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correct value. This adds a workaround for these devices.
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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Cc: linux-mips@linux-mips.org
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Patchwork: https://patchwork.linux-mips.org/patch/5843/
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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--- a/arch/mips/bcm47xx/time.c
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+++ b/arch/mips/bcm47xx/time.c
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@@ -28,6 +28,7 @@
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#include <asm/time.h>
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#include <bcm47xx.h>
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#include <bcm47xx_nvram.h>
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+#include <bcm47xx_board.h>
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void __init plat_time_init(void)
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{
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@@ -35,6 +36,7 @@ void __init plat_time_init(void)
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u16 chip_id = 0;
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char buf[10];
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int len;
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+ enum bcm47xx_board board = bcm47xx_board_get();
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/*
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* Use deterministic values for initial counter interrupt
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@@ -64,6 +66,15 @@ void __init plat_time_init(void)
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hz = 100000000;
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}
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+ switch (board) {
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+ case BCM47XX_BOARD_ASUS_WL520GC:
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+ case BCM47XX_BOARD_ASUS_WL520GU:
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+ hz = 100000000;
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+ break;
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+ default:
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+ break;
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+ }
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+
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if (!hz)
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hz = 100000000;
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