mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-20 22:23:27 +00:00
f584fb2f7e
Import some accepted and pending upstream patches for mtk_eth_soc, replacing some semantically equivalent local patches and fixing issues when operating the PCS in 1G SGMII mode. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
23 lines
936 B
Diff
23 lines
936 B
Diff
From 06773f19cffd6c9d34dcbc8320169afef5ab60ba Mon Sep 17 00:00:00 2001
|
|
From: Alexander Couzens <lynxis@fe80.eu>
|
|
Date: Mon, 15 Aug 2022 13:58:07 +0200
|
|
Subject: [PATCH 09/10] net: mtk_eth_soc: improve comment
|
|
|
|
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
|
|
---
|
|
drivers/net/ethernet/mediatek/mtk_sgmii.c | 3 ++-
|
|
1 file changed, 2 insertions(+), 1 deletion(-)
|
|
|
|
--- a/drivers/net/ethernet/mediatek/mtk_sgmii.c
|
|
+++ b/drivers/net/ethernet/mediatek/mtk_sgmii.c
|
|
@@ -67,7 +67,8 @@ static int mtk_pcs_setup_mode_force(stru
|
|
val &= ~SGMII_AN_ENABLE;
|
|
regmap_write(mpcs->regmap, SGMSYS_PCS_CONTROL_1, val);
|
|
|
|
- /* Set the speed etc but leave the duplex unchanged */
|
|
+ /* Set the speed etc but leave the duplex unchanged.
|
|
+ * The SGMII mode for 2.5gbit is the same as for 1gbit, expect the speed in ANA_RGC3 */
|
|
regmap_read(mpcs->regmap, SGMSYS_SGMII_MODE, &val);
|
|
val &= SGMII_DUPLEX_HALF | ~SGMII_IF_MODE_MASK;
|
|
val |= SGMII_SPEED_1000;
|