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It's required to support NAND controllers with WP pin on boards that don't have it connected to NAND chip. Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
92 lines
2.7 KiB
Diff
92 lines
2.7 KiB
Diff
From: Florian Fainelli <f.fainelli@gmail.com>
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Subject: [PATCH v3 5/9] mtd: rawnand: brcmnand: Allow working without interrupts
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Date: Fri, 07 Jan 2022 10:46:10 -0800
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Content-Type: text/plain; charset="utf-8"
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The BCMA devices include the brcmnand controller but they do not wire up
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any interrupt line, allow the main interrupt to be optional and update
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the completion path to also check for the lack of an interrupt line.
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Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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---
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drivers/mtd/nand/raw/brcmnand/brcmnand.c | 52 +++++++++++-------------
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1 file changed, 24 insertions(+), 28 deletions(-)
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--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
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+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
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@@ -216,7 +216,7 @@ struct brcmnand_controller {
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void __iomem *nand_base;
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void __iomem *nand_fc; /* flash cache */
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void __iomem *flash_dma_base;
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- unsigned int irq;
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+ int irq;
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unsigned int dma_irq;
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int nand_version;
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@@ -1650,7 +1650,7 @@ static bool brcmstb_nand_wait_for_comple
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bool err = false;
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int sts;
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- if (mtd->oops_panic_write) {
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+ if (mtd->oops_panic_write || ctrl->irq < 0) {
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/* switch to interrupt polling and PIO mode */
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disable_ctrl_irqs(ctrl);
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sts = bcmnand_ctrl_poll_status(ctrl, NAND_CTRL_RDY,
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@@ -3191,33 +3191,29 @@ int brcmnand_probe(struct platform_devic
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}
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/* IRQ */
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- ctrl->irq = platform_get_irq(pdev, 0);
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- if ((int)ctrl->irq < 0) {
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- dev_err(dev, "no IRQ defined\n");
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- ret = -ENODEV;
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- goto err;
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- }
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-
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- /*
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- * Some SoCs integrate this controller (e.g., its interrupt bits) in
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- * interesting ways
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- */
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- if (soc) {
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- ret = devm_request_irq(dev, ctrl->irq, brcmnand_irq, 0,
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- DRV_NAME, ctrl);
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-
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- /* Enable interrupt */
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- ctrl->soc->ctlrdy_ack(ctrl->soc);
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- ctrl->soc->ctlrdy_set_enabled(ctrl->soc, true);
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- } else {
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- /* Use standard interrupt infrastructure */
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- ret = devm_request_irq(dev, ctrl->irq, brcmnand_ctlrdy_irq, 0,
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- DRV_NAME, ctrl);
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- }
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- if (ret < 0) {
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- dev_err(dev, "can't allocate IRQ %d: error %d\n",
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- ctrl->irq, ret);
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- goto err;
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+ ctrl->irq = platform_get_irq_optional(pdev, 0);
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+ if (ctrl->irq > 0) {
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+ /*
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+ * Some SoCs integrate this controller (e.g., its interrupt bits) in
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+ * interesting ways
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+ */
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+ if (soc) {
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+ ret = devm_request_irq(dev, ctrl->irq, brcmnand_irq, 0,
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+ DRV_NAME, ctrl);
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+
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+ /* Enable interrupt */
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+ ctrl->soc->ctlrdy_ack(ctrl->soc);
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+ ctrl->soc->ctlrdy_set_enabled(ctrl->soc, true);
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+ } else {
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+ /* Use standard interrupt infrastructure */
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+ ret = devm_request_irq(dev, ctrl->irq, brcmnand_ctlrdy_irq, 0,
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+ DRV_NAME, ctrl);
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+ }
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+ if (ret < 0) {
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+ dev_err(dev, "can't allocate IRQ %d: error %d\n",
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+ ctrl->irq, ret);
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+ goto err;
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+ }
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}
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for_each_available_child_of_node(dn, child) {
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