mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-21 06:33:41 +00:00
ad907e1c03
Add support for NXP layerscape ls1046ardb 64b/32b Dev board. LS1046ARDB Specification: ------------------------- Memory subsystem: * 8GByte DDR4 SDRAM (64bit bus) * 512 Mbyte NAND flash * Two 64 Mbyte high-speed SPI flash * SD connector to interface with the SD memory card * On-board 4G eMMC Ethernet: * Two XFI 10G ports * Two SGMII ports * Two RGMII ports PCIe: * PCIe1 (SerDes2 Lane0) to miniPCIe slot * PCIe2 (SerDes2 Lane1) to x2 PCIe slot * PCIe3 (SerDes2 Lane2) to x4 PCIe slot * USB 3.0: one super speed USB 3.0 type A port, one Micro-AB port * UART: supports two UARTs up to 115200 bps for console Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>
64 lines
1.9 KiB
Diff
64 lines
1.9 KiB
Diff
From 637a6e183edf302111b28461c0c98b9634b30437 Mon Sep 17 00:00:00 2001
|
|
From: Mingkai Hu <mingkai.hu@nxp.com>
|
|
Date: Fri, 1 Apr 2016 17:11:10 +0800
|
|
Subject: [PATCH 126/141] net: phy: add driver for aquantia AQR106/107 phy
|
|
|
|
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
|
|
---
|
|
drivers/net/phy/aquantia.c | 30 ++++++++++++++++++++++++++++++
|
|
1 file changed, 30 insertions(+)
|
|
|
|
--- a/drivers/net/phy/aquantia.c
|
|
+++ b/drivers/net/phy/aquantia.c
|
|
@@ -21,6 +21,8 @@
|
|
#define PHY_ID_AQ1202 0x03a1b445
|
|
#define PHY_ID_AQ2104 0x03a1b460
|
|
#define PHY_ID_AQR105 0x03a1b4a2
|
|
+#define PHY_ID_AQR106 0x03a1b4d0
|
|
+#define PHY_ID_AQR107 0x03a1b4e0
|
|
#define PHY_ID_AQR405 0x03a1b4b0
|
|
|
|
#define PHY_AQUANTIA_FEATURES (SUPPORTED_10000baseT_Full | \
|
|
@@ -157,6 +159,32 @@ static struct phy_driver aquantia_driver
|
|
.driver = { .owner = THIS_MODULE,},
|
|
},
|
|
{
|
|
+ .phy_id = PHY_ID_AQR106,
|
|
+ .phy_id_mask = 0xfffffff0,
|
|
+ .name = "Aquantia AQR106",
|
|
+ .features = PHY_AQUANTIA_FEATURES,
|
|
+ .flags = PHY_HAS_INTERRUPT,
|
|
+ .aneg_done = aquantia_aneg_done,
|
|
+ .config_aneg = aquantia_config_aneg,
|
|
+ .config_intr = aquantia_config_intr,
|
|
+ .ack_interrupt = aquantia_ack_interrupt,
|
|
+ .read_status = aquantia_read_status,
|
|
+ .driver = { .owner = THIS_MODULE,},
|
|
+},
|
|
+{
|
|
+ .phy_id = PHY_ID_AQR107,
|
|
+ .phy_id_mask = 0xfffffff0,
|
|
+ .name = "Aquantia AQR107",
|
|
+ .features = PHY_AQUANTIA_FEATURES,
|
|
+ .flags = PHY_HAS_INTERRUPT,
|
|
+ .aneg_done = aquantia_aneg_done,
|
|
+ .config_aneg = aquantia_config_aneg,
|
|
+ .config_intr = aquantia_config_intr,
|
|
+ .ack_interrupt = aquantia_ack_interrupt,
|
|
+ .read_status = aquantia_read_status,
|
|
+ .driver = { .owner = THIS_MODULE,},
|
|
+},
|
|
+{
|
|
.phy_id = PHY_ID_AQR405,
|
|
.phy_id_mask = 0xfffffff0,
|
|
.name = "Aquantia AQR405",
|
|
@@ -177,6 +205,8 @@ static struct mdio_device_id __maybe_unu
|
|
{ PHY_ID_AQ1202, 0xfffffff0 },
|
|
{ PHY_ID_AQ2104, 0xfffffff0 },
|
|
{ PHY_ID_AQR105, 0xfffffff0 },
|
|
+ { PHY_ID_AQR106, 0xfffffff0 },
|
|
+ { PHY_ID_AQR107, 0xfffffff0 },
|
|
{ PHY_ID_AQR405, 0xfffffff0 },
|
|
{ }
|
|
};
|