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https://github.com/openwrt/openwrt.git
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e2b064f5a4
Add several dt backports for the Gateworks Venice product family. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Link: https://github.com/openwrt/openwrt/pull/17717 Signed-off-by: Robert Marko <robimarko@gmail.com> Link: https://github.com/openwrt/openwrt/pull/17762 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> (cherry picked from commit 1ce87cf25c19f030b81954639545db2ab7f17062)
1427 lines
34 KiB
Diff
1427 lines
34 KiB
Diff
From 14c3de96e14b30b1b83016abe607034a5a7e1c6b Mon Sep 17 00:00:00 2001
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From: Tim Harvey <tharvey@gateworks.com>
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Date: Wed, 24 Jan 2024 10:16:03 -0800
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Subject: [PATCH] arm64: dts: freescale: rename gw7905 to gw75xx
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The GW7905 was renamed to GW7500 before production release.
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Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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---
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Documentation/devicetree/bindings/arm/fsl.yaml | 4 ++--
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arch/arm64/boot/dts/freescale/Makefile | 4 ++--
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...8mm-venice-gw7905-0x.dts => imx8mm-venice-gw75xx-0x.dts} | 6 +++---
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...{imx8mm-venice-gw7905.dtsi => imx8mm-venice-gw75xx.dtsi} | 0
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...8mp-venice-gw7905-2x.dts => imx8mp-venice-gw75xx-2x.dts} | 6 +++---
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...{imx8mp-venice-gw7905.dtsi => imx8mp-venice-gw75xx.dtsi} | 0
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6 files changed, 10 insertions(+), 10 deletions(-)
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rename arch/arm64/boot/dts/freescale/{imx8mm-venice-gw7905-0x.dts => imx8mm-venice-gw75xx-0x.dts} (67%)
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rename arch/arm64/boot/dts/freescale/{imx8mm-venice-gw7905.dtsi => imx8mm-venice-gw75xx.dtsi} (100%)
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rename arch/arm64/boot/dts/freescale/{imx8mp-venice-gw7905-2x.dts => imx8mp-venice-gw75xx-2x.dts} (67%)
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rename arch/arm64/boot/dts/freescale/{imx8mp-venice-gw7905.dtsi => imx8mp-venice-gw75xx.dtsi} (100%)
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--- a/Documentation/devicetree/bindings/arm/fsl.yaml
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+++ b/Documentation/devicetree/bindings/arm/fsl.yaml
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@@ -908,8 +908,8 @@ properties:
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- fsl,imx8mm-ddr4-evk # i.MX8MM DDR4 EVK Board
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- fsl,imx8mm-evk # i.MX8MM EVK Board
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- fsl,imx8mm-evkb # i.MX8MM EVKB Board
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+ - gateworks,imx8mm-gw75xx-0x # i.MX8MM Gateworks Board
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- gateworks,imx8mm-gw7904
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- - gateworks,imx8mm-gw7905-0x # i.MX8MM Gateworks Board
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- gw,imx8mm-gw71xx-0x # i.MX8MM Gateworks Development Kit
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- gw,imx8mm-gw72xx-0x # i.MX8MM Gateworks Development Kit
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- gw,imx8mm-gw73xx-0x # i.MX8MM Gateworks Development Kit
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@@ -1036,7 +1036,7 @@ properties:
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- gateworks,imx8mp-gw72xx-2x # i.MX8MP Gateworks Board
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- gateworks,imx8mp-gw73xx-2x # i.MX8MP Gateworks Board
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- gateworks,imx8mp-gw74xx # i.MX8MP Gateworks Board
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- - gateworks,imx8mp-gw7905-2x # i.MX8MP Gateworks Board
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+ - gateworks,imx8mp-gw75xx-2x # i.MX8MP Gateworks Board
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- toradex,verdin-imx8mp # Verdin iMX8M Plus Modules
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- toradex,verdin-imx8mp-nonwifi # Verdin iMX8M Plus Modules without Wi-Fi / BT
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- toradex,verdin-imx8mp-wifi # Verdin iMX8M Plus Wi-Fi / BT Modules
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--- a/arch/arm64/boot/dts/freescale/Makefile
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+++ b/arch/arm64/boot/dts/freescale/Makefile
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@@ -72,11 +72,11 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-var-som
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dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw71xx-0x.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw72xx-0x.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw73xx-0x.dtb
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+dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw75xx-0x.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7901.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7902.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7903.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7904.dtb
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-dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw7905-0x.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-nonwifi-dahlia.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-nonwifi-dev.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mm-verdin-nonwifi-yavia.dtb
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@@ -107,7 +107,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw72xx-2x.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw73xx-2x.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw74xx.dtb
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-dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw7905-2x.dtb
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+dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw75xx-2x.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-dahlia.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-dev.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-verdin-nonwifi-yavia.dtb
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--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7905-0x.dts
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+++ /dev/null
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@@ -1,28 +0,0 @@
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-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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-/*
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- * Copyright 2023 Gateworks Corporation
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- */
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-
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-/dts-v1/;
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-
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-#include "imx8mm.dtsi"
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-#include "imx8mm-venice-gw700x.dtsi"
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-#include "imx8mm-venice-gw7905.dtsi"
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-
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-/ {
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- model = "Gateworks Venice GW7905-0x i.MX8MM Development Kit";
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- compatible = "gateworks,imx8mm-gw7905-0x", "fsl,imx8mm";
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-
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- chosen {
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- stdout-path = &uart2;
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- };
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-};
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-
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-/* Disable SOM interfaces not used on baseboard */
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-&fec1 {
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- status = "disabled";
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-};
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-
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-&usdhc1 {
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- status = "disabled";
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-};
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--- /dev/null
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+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx-0x.dts
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@@ -0,0 +1,28 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright 2023 Gateworks Corporation
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+ */
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+
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+/dts-v1/;
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+
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+#include "imx8mm.dtsi"
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+#include "imx8mm-venice-gw700x.dtsi"
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+#include "imx8mm-venice-gw75xx.dtsi"
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+
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+/ {
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+ model = "Gateworks Venice GW75xx-0x i.MX8MM Development Kit";
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+ compatible = "gateworks,imx8mm-gw75xx-0x", "fsl,imx8mm";
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+
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+ chosen {
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+ stdout-path = &uart2;
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+ };
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+};
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+
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+/* Disable SOM interfaces not used on baseboard */
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+&fec1 {
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+ status = "disabled";
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+};
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+
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+&usdhc1 {
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+ status = "disabled";
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+};
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--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw7905-2x.dts
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+++ /dev/null
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@@ -1,28 +0,0 @@
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-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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-/*
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- * Copyright 2023 Gateworks Corporation
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- */
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-
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-/dts-v1/;
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-
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-#include "imx8mp.dtsi"
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-#include "imx8mp-venice-gw702x.dtsi"
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-#include "imx8mp-venice-gw7905.dtsi"
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-
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-/ {
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- model = "Gateworks Venice GW7905-2x i.MX8MP Development Kit";
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- compatible = "gateworks,imx8mp-gw7905-2x", "fsl,imx8mp";
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-
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- chosen {
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- stdout-path = &uart2;
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- };
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-};
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-
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-/* Disable SOM interfaces not used on baseboard */
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-&eqos {
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- status = "disabled";
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-};
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-
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-&usdhc1 {
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- status = "disabled";
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-};
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--- /dev/null
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+++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx-2x.dts
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@@ -0,0 +1,28 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright 2023 Gateworks Corporation
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+ */
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+
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+/dts-v1/;
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+
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+#include "imx8mp.dtsi"
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+#include "imx8mp-venice-gw702x.dtsi"
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+#include "imx8mp-venice-gw75xx.dtsi"
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+
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+/ {
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+ model = "Gateworks Venice GW75xx-2x i.MX8MP Development Kit";
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+ compatible = "gateworks,imx8mp-gw75xx-2x", "fsl,imx8mp";
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+
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+ chosen {
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+ stdout-path = &uart2;
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+ };
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+};
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+
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+/* Disable SOM interfaces not used on baseboard */
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+&eqos {
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+ status = "disabled";
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+};
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+
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+&usdhc1 {
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+ status = "disabled";
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+};
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--- /dev/null
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+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw75xx.dtsi
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@@ -0,0 +1,303 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright 2023 Gateworks Corporation
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+ */
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+
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/leds/common.h>
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+#include <dt-bindings/phy/phy-imx8-pcie.h>
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+
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+/ {
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+ led-controller {
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+ compatible = "gpio-leds";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_gpio_leds>;
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+
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+ led-0 {
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+ function = LED_FUNCTION_STATUS;
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+ color = <LED_COLOR_ID_GREEN>;
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+ gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
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+ default-state = "on";
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+ linux,default-trigger = "heartbeat";
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+ };
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+
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+ led-1 {
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+ function = LED_FUNCTION_STATUS;
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+ color = <LED_COLOR_ID_RED>;
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+ gpios = <&gpio4 2 GPIO_ACTIVE_HIGH>;
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+ default-state = "off";
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+ };
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+ };
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+
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+ pcie0_refclk: clock-pcie0 {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ clock-frequency = <100000000>;
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+ };
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+
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+ pps {
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+ compatible = "pps-gpio";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_pps>;
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+ gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>;
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+ status = "okay";
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+ };
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+
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+ reg_usb2_vbus: regulator-usb2-vbus {
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+ compatible = "regulator-fixed";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_reg_usb2_en>;
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+ regulator-name = "usb2_vbus";
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+ gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
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+ enable-active-high;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ };
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+
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+ reg_usdhc2_vmmc: regulator-usdhc2 {
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+ compatible = "regulator-fixed";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
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+ regulator-name = "SD2_3P3V";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
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+ enable-active-high;
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+ };
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+};
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+
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+/* off-board header */
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+&ecspi2 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_spi2>;
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+ cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
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+ status = "okay";
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+};
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+
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+&gpio1 {
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+ gpio-line-names =
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+ "", "", "", "",
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+ "", "", "", "",
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+ "", "", "", "",
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+ "", "gpioa", "gpiob", "",
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+ "", "", "", "",
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+ "", "", "", "",
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+ "", "", "", "",
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+ "", "", "", "";
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+};
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+
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+&gpio4 {
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+ gpio-line-names =
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+ "", "", "", "pci_usb_sel",
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+ "", "", "", "pci_wdis#",
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+ "", "", "", "",
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+ "", "", "", "",
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+ "", "", "", "",
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+ "", "", "", "",
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+ "", "", "", "",
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+ "", "", "", "";
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+};
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+
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+&gpio5 {
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+ gpio-line-names =
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+ "", "", "", "",
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+ "gpioc", "gpiod", "", "",
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+ "", "", "", "",
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+ "", "", "", "",
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+ "", "", "", "",
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+ "", "", "", "",
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+ "", "", "", "",
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+ "", "", "", "";
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+};
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+
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+&i2c2 {
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+ clock-frequency = <400000>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_i2c2>;
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+ status = "okay";
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+
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+ eeprom@52 {
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+ compatible = "atmel,24c32";
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+ reg = <0x52>;
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+ pagesize = <32>;
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+ };
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+};
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+
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+/* off-board header */
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+&i2c3 {
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+ clock-frequency = <400000>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_i2c3>;
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+ status = "okay";
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+};
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+
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+&pcie_phy {
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+ fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
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+ fsl,clkreq-unsupported;
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+ clocks = <&pcie0_refclk>;
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+ clock-names = "ref";
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+ status = "okay";
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+};
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+
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+&pcie0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_pcie0>;
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+ reset-gpio = <&gpio4 6 GPIO_ACTIVE_LOW>;
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+ status = "okay";
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+};
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+
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+/* GPS */
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+&uart1 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_uart1>;
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+ status = "okay";
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+};
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+
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+/* USB1 - Type C front panel SINK port J14 */
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+&usbotg1 {
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+ dr_mode = "peripheral";
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+ status = "okay";
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+};
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+
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+/* USB2 4-port USB3.0 HUB:
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+ * P1 - USBC connector (host only)
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+ * P2 - USB2 test connector
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+ * P3 - miniPCIe full card
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+ * P4 - miniPCIe half card
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+ */
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+&usbotg2 {
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+ dr_mode = "host";
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+ vbus-supply = <®_usb2_vbus>;
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+ status = "okay";
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+};
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+
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+/* microSD */
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+&usdhc2 {
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+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
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+ pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
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+ pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
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+ pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
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+ cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
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+ vmmc-supply = <®_usdhc2_vmmc>;
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+ bus-width = <4>;
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+ status = "okay";
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+};
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+
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+&iomuxc {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_hog>;
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+
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+ pinctrl_hog: hoggrp {
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+ fsl,pins = <
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+ MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x40000040 /* GPIOA */
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+ MX8MM_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x40000040 /* GPIOB */
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+ MX8MM_IOMUXC_SAI1_RXD1_GPIO4_IO3 0x40000106 /* PCI_USBSEL */
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+ MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x40000106 /* PCIE_WDIS# */
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+ MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x40000040 /* GPIOD */
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+ MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4 0x40000040 /* GPIOC */
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+ >;
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+ };
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+
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+ pinctrl_gpio_leds: gpioledgrp {
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+ fsl,pins = <
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+ MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0 0x6 /* LEDG */
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+ MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2 0x6 /* LEDR */
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+ >;
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+ };
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+
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+ pinctrl_i2c2: i2c2grp {
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+ fsl,pins = <
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|
+ MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c2
|
|
+ MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c2
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ pinctrl_i2c3: i2c3grp {
|
|
+ fsl,pins = <
|
|
+ MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c2
|
|
+ MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c2
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ pinctrl_pcie0: pciegrp {
|
|
+ fsl,pins = <
|
|
+ MX8MM_IOMUXC_SAI1_RXD4_GPIO4_IO6 0x106
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ pinctrl_pps: ppsgrp {
|
|
+ fsl,pins = <
|
|
+ MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5 0x106
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ pinctrl_reg_usb2_en: regusb2grp {
|
|
+ fsl,pins = <
|
|
+ MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x6 /* USBHUB_RST# (ext p/u) */
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
|
|
+ fsl,pins = <
|
|
+ MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x40
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ pinctrl_spi2: spi2grp {
|
|
+ fsl,pins = <
|
|
+ MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x140
|
|
+ MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x140
|
|
+ MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x140
|
|
+ MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x140
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ pinctrl_uart1: uart1grp {
|
|
+ fsl,pins = <
|
|
+ MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
|
|
+ MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ pinctrl_usdhc2: usdhc2grp {
|
|
+ fsl,pins = <
|
|
+ MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
|
|
+ MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
|
|
+ MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
|
|
+ MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
|
|
+ MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
|
|
+ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
|
|
+ MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc0
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
|
|
+ fsl,pins = <
|
|
+ MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
|
|
+ MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
|
|
+ MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
|
|
+ MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
|
|
+ MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
|
|
+ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
|
|
+ MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc0
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
|
|
+ fsl,pins = <
|
|
+ MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
|
|
+ MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
|
|
+ MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
|
|
+ MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
|
|
+ MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
|
|
+ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
|
|
+ MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc0
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ pinctrl_usdhc2_gpio: usdhc2gpiogrp {
|
|
+ fsl,pins = <
|
|
+ MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x1c4
|
|
+ >;
|
|
+ };
|
|
+};
|
|
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7905.dtsi
|
|
+++ /dev/null
|
|
@@ -1,303 +0,0 @@
|
|
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
-/*
|
|
- * Copyright 2023 Gateworks Corporation
|
|
- */
|
|
-
|
|
-#include <dt-bindings/gpio/gpio.h>
|
|
-#include <dt-bindings/leds/common.h>
|
|
-#include <dt-bindings/phy/phy-imx8-pcie.h>
|
|
-
|
|
-/ {
|
|
- led-controller {
|
|
- compatible = "gpio-leds";
|
|
- pinctrl-names = "default";
|
|
- pinctrl-0 = <&pinctrl_gpio_leds>;
|
|
-
|
|
- led-0 {
|
|
- function = LED_FUNCTION_STATUS;
|
|
- color = <LED_COLOR_ID_GREEN>;
|
|
- gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
|
|
- default-state = "on";
|
|
- linux,default-trigger = "heartbeat";
|
|
- };
|
|
-
|
|
- led-1 {
|
|
- function = LED_FUNCTION_STATUS;
|
|
- color = <LED_COLOR_ID_RED>;
|
|
- gpios = <&gpio4 2 GPIO_ACTIVE_HIGH>;
|
|
- default-state = "off";
|
|
- };
|
|
- };
|
|
-
|
|
- pcie0_refclk: clock-pcie0 {
|
|
- compatible = "fixed-clock";
|
|
- #clock-cells = <0>;
|
|
- clock-frequency = <100000000>;
|
|
- };
|
|
-
|
|
- pps {
|
|
- compatible = "pps-gpio";
|
|
- pinctrl-names = "default";
|
|
- pinctrl-0 = <&pinctrl_pps>;
|
|
- gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>;
|
|
- status = "okay";
|
|
- };
|
|
-
|
|
- reg_usb2_vbus: regulator-usb2-vbus {
|
|
- compatible = "regulator-fixed";
|
|
- pinctrl-names = "default";
|
|
- pinctrl-0 = <&pinctrl_reg_usb2_en>;
|
|
- regulator-name = "usb2_vbus";
|
|
- gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
|
|
- enable-active-high;
|
|
- regulator-min-microvolt = <5000000>;
|
|
- regulator-max-microvolt = <5000000>;
|
|
- };
|
|
-
|
|
- reg_usdhc2_vmmc: regulator-usdhc2 {
|
|
- compatible = "regulator-fixed";
|
|
- pinctrl-names = "default";
|
|
- pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
|
|
- regulator-name = "SD2_3P3V";
|
|
- regulator-min-microvolt = <3300000>;
|
|
- regulator-max-microvolt = <3300000>;
|
|
- gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
|
|
- enable-active-high;
|
|
- };
|
|
-};
|
|
-
|
|
-/* off-board header */
|
|
-&ecspi2 {
|
|
- pinctrl-names = "default";
|
|
- pinctrl-0 = <&pinctrl_spi2>;
|
|
- cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
|
|
- status = "okay";
|
|
-};
|
|
-
|
|
-&gpio1 {
|
|
- gpio-line-names =
|
|
- "", "", "", "",
|
|
- "", "", "", "",
|
|
- "", "", "", "",
|
|
- "", "gpioa", "gpiob", "",
|
|
- "", "", "", "",
|
|
- "", "", "", "",
|
|
- "", "", "", "",
|
|
- "", "", "", "";
|
|
-};
|
|
-
|
|
-&gpio4 {
|
|
- gpio-line-names =
|
|
- "", "", "", "pci_usb_sel",
|
|
- "", "", "", "pci_wdis#",
|
|
- "", "", "", "",
|
|
- "", "", "", "",
|
|
- "", "", "", "",
|
|
- "", "", "", "",
|
|
- "", "", "", "",
|
|
- "", "", "", "";
|
|
-};
|
|
-
|
|
-&gpio5 {
|
|
- gpio-line-names =
|
|
- "", "", "", "",
|
|
- "gpioc", "gpiod", "", "",
|
|
- "", "", "", "",
|
|
- "", "", "", "",
|
|
- "", "", "", "",
|
|
- "", "", "", "",
|
|
- "", "", "", "",
|
|
- "", "", "", "";
|
|
-};
|
|
-
|
|
-&i2c2 {
|
|
- clock-frequency = <400000>;
|
|
- pinctrl-names = "default";
|
|
- pinctrl-0 = <&pinctrl_i2c2>;
|
|
- status = "okay";
|
|
-
|
|
- eeprom@52 {
|
|
- compatible = "atmel,24c32";
|
|
- reg = <0x52>;
|
|
- pagesize = <32>;
|
|
- };
|
|
-};
|
|
-
|
|
-/* off-board header */
|
|
-&i2c3 {
|
|
- clock-frequency = <400000>;
|
|
- pinctrl-names = "default";
|
|
- pinctrl-0 = <&pinctrl_i2c3>;
|
|
- status = "okay";
|
|
-};
|
|
-
|
|
-&pcie_phy {
|
|
- fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
|
|
- fsl,clkreq-unsupported;
|
|
- clocks = <&pcie0_refclk>;
|
|
- clock-names = "ref";
|
|
- status = "okay";
|
|
-};
|
|
-
|
|
-&pcie0 {
|
|
- pinctrl-names = "default";
|
|
- pinctrl-0 = <&pinctrl_pcie0>;
|
|
- reset-gpio = <&gpio4 6 GPIO_ACTIVE_LOW>;
|
|
- status = "okay";
|
|
-};
|
|
-
|
|
-/* GPS */
|
|
-&uart1 {
|
|
- pinctrl-names = "default";
|
|
- pinctrl-0 = <&pinctrl_uart1>;
|
|
- status = "okay";
|
|
-};
|
|
-
|
|
-/* USB1 - Type C front panel SINK port J14 */
|
|
-&usbotg1 {
|
|
- dr_mode = "peripheral";
|
|
- status = "okay";
|
|
-};
|
|
-
|
|
-/* USB2 4-port USB3.0 HUB:
|
|
- * P1 - USBC connector (host only)
|
|
- * P2 - USB2 test connector
|
|
- * P3 - miniPCIe full card
|
|
- * P4 - miniPCIe half card
|
|
- */
|
|
-&usbotg2 {
|
|
- dr_mode = "host";
|
|
- vbus-supply = <®_usb2_vbus>;
|
|
- status = "okay";
|
|
-};
|
|
-
|
|
-/* microSD */
|
|
-&usdhc2 {
|
|
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
|
- pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
|
|
- pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
|
|
- pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
|
|
- cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
|
|
- vmmc-supply = <®_usdhc2_vmmc>;
|
|
- bus-width = <4>;
|
|
- status = "okay";
|
|
-};
|
|
-
|
|
-&iomuxc {
|
|
- pinctrl-names = "default";
|
|
- pinctrl-0 = <&pinctrl_hog>;
|
|
-
|
|
- pinctrl_hog: hoggrp {
|
|
- fsl,pins = <
|
|
- MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x40000040 /* GPIOA */
|
|
- MX8MM_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x40000040 /* GPIOB */
|
|
- MX8MM_IOMUXC_SAI1_RXD1_GPIO4_IO3 0x40000106 /* PCI_USBSEL */
|
|
- MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x40000106 /* PCIE_WDIS# */
|
|
- MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x40000040 /* GPIOD */
|
|
- MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4 0x40000040 /* GPIOC */
|
|
- >;
|
|
- };
|
|
-
|
|
- pinctrl_gpio_leds: gpioledgrp {
|
|
- fsl,pins = <
|
|
- MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0 0x6 /* LEDG */
|
|
- MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2 0x6 /* LEDR */
|
|
- >;
|
|
- };
|
|
-
|
|
- pinctrl_i2c2: i2c2grp {
|
|
- fsl,pins = <
|
|
- MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c2
|
|
- MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c2
|
|
- >;
|
|
- };
|
|
-
|
|
- pinctrl_i2c3: i2c3grp {
|
|
- fsl,pins = <
|
|
- MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c2
|
|
- MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c2
|
|
- >;
|
|
- };
|
|
-
|
|
- pinctrl_pcie0: pciegrp {
|
|
- fsl,pins = <
|
|
- MX8MM_IOMUXC_SAI1_RXD4_GPIO4_IO6 0x106
|
|
- >;
|
|
- };
|
|
-
|
|
- pinctrl_pps: ppsgrp {
|
|
- fsl,pins = <
|
|
- MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5 0x106
|
|
- >;
|
|
- };
|
|
-
|
|
- pinctrl_reg_usb2_en: regusb2grp {
|
|
- fsl,pins = <
|
|
- MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x6 /* USBHUB_RST# (ext p/u) */
|
|
- >;
|
|
- };
|
|
-
|
|
- pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
|
|
- fsl,pins = <
|
|
- MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x40
|
|
- >;
|
|
- };
|
|
-
|
|
- pinctrl_spi2: spi2grp {
|
|
- fsl,pins = <
|
|
- MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x140
|
|
- MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x140
|
|
- MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x140
|
|
- MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x140
|
|
- >;
|
|
- };
|
|
-
|
|
- pinctrl_uart1: uart1grp {
|
|
- fsl,pins = <
|
|
- MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
|
|
- MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
|
|
- >;
|
|
- };
|
|
-
|
|
- pinctrl_usdhc2: usdhc2grp {
|
|
- fsl,pins = <
|
|
- MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
|
|
- MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
|
|
- MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
|
|
- MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
|
|
- MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
|
|
- MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
|
|
- MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc0
|
|
- >;
|
|
- };
|
|
-
|
|
- pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
|
|
- fsl,pins = <
|
|
- MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
|
|
- MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
|
|
- MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
|
|
- MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
|
|
- MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
|
|
- MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
|
|
- MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc0
|
|
- >;
|
|
- };
|
|
-
|
|
- pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
|
|
- fsl,pins = <
|
|
- MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
|
|
- MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
|
|
- MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
|
|
- MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
|
|
- MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
|
|
- MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
|
|
- MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc0
|
|
- >;
|
|
- };
|
|
-
|
|
- pinctrl_usdhc2_gpio: usdhc2gpiogrp {
|
|
- fsl,pins = <
|
|
- MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x1c4
|
|
- >;
|
|
- };
|
|
-};
|
|
--- /dev/null
|
|
+++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw75xx.dtsi
|
|
@@ -0,0 +1,309 @@
|
|
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
+/*
|
|
+ * Copyright 2023 Gateworks Corporation
|
|
+ */
|
|
+
|
|
+#include <dt-bindings/gpio/gpio.h>
|
|
+#include <dt-bindings/leds/common.h>
|
|
+#include <dt-bindings/phy/phy-imx8-pcie.h>
|
|
+
|
|
+/ {
|
|
+ led-controller {
|
|
+ compatible = "gpio-leds";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pinctrl_gpio_leds>;
|
|
+
|
|
+ led-0 {
|
|
+ function = LED_FUNCTION_STATUS;
|
|
+ color = <LED_COLOR_ID_GREEN>;
|
|
+ gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
|
|
+ default-state = "on";
|
|
+ linux,default-trigger = "heartbeat";
|
|
+ };
|
|
+
|
|
+ led-1 {
|
|
+ function = LED_FUNCTION_STATUS;
|
|
+ color = <LED_COLOR_ID_RED>;
|
|
+ gpios = <&gpio4 27 GPIO_ACTIVE_HIGH>;
|
|
+ default-state = "off";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pcie0_refclk: pcie0-refclk {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-frequency = <100000000>;
|
|
+ };
|
|
+
|
|
+ pps {
|
|
+ compatible = "pps-gpio";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pinctrl_pps>;
|
|
+ gpios = <&gpio4 21 GPIO_ACTIVE_HIGH>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ reg_usb2_vbus: regulator-usb2-vbus {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pinctrl_reg_usb2_en>;
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "usb2_vbus";
|
|
+ gpio = <&gpio4 12 GPIO_ACTIVE_HIGH>;
|
|
+ enable-active-high;
|
|
+ regulator-min-microvolt = <5000000>;
|
|
+ regulator-max-microvolt = <5000000>;
|
|
+ };
|
|
+
|
|
+ reg_usdhc2_vmmc: regulator-usdhc2 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
|
|
+ compatible = "regulator-fixed";
|
|
+ regulator-name = "SD2_3P3V";
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
|
|
+ enable-active-high;
|
|
+ };
|
|
+};
|
|
+
|
|
+/* off-board header */
|
|
+&ecspi2 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pinctrl_spi2>;
|
|
+ cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&gpio4 {
|
|
+ gpio-line-names =
|
|
+ "", "", "", "",
|
|
+ "", "", "", "",
|
|
+ "", "", "", "",
|
|
+ "", "gpioa", "", "",
|
|
+ "", "", "", "",
|
|
+ "", "", "", "",
|
|
+ "", "", "", "",
|
|
+ "", "", "", "";
|
|
+};
|
|
+
|
|
+&gpio4 {
|
|
+ gpio-line-names =
|
|
+ "", "gpiod", "", "",
|
|
+ "gpiob", "gpioc", "", "",
|
|
+ "", "", "", "",
|
|
+ "", "", "", "",
|
|
+ "", "", "", "",
|
|
+ "", "", "", "",
|
|
+ "", "", "pci_usb_sel", "",
|
|
+ "pci_wdis#", "", "", "";
|
|
+};
|
|
+
|
|
+&i2c2 {
|
|
+ clock-frequency = <400000>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pinctrl_i2c2>;
|
|
+ status = "okay";
|
|
+
|
|
+ eeprom@52 {
|
|
+ compatible = "atmel,24c32";
|
|
+ reg = <0x52>;
|
|
+ pagesize = <32>;
|
|
+ };
|
|
+};
|
|
+
|
|
+/* off-board header */
|
|
+&i2c3 {
|
|
+ clock-frequency = <400000>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pinctrl_i2c3>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pcie_phy {
|
|
+ fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
|
|
+ fsl,clkreq-unsupported;
|
|
+ clocks = <&pcie0_refclk>;
|
|
+ clock-names = "ref";
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pcie {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pinctrl_pcie0>;
|
|
+ reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+/* GPS */
|
|
+&uart1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pinctrl_uart1>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+/* USB1 - Type C front panel SINK port J14 */
|
|
+&usb3_0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb3_phy0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_dwc3_0 {
|
|
+ dr_mode = "peripheral";
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+/* USB2 4-port USB3.0 HUB:
|
|
+ * P1 - USBC connector (host only)
|
|
+ * P2 - USB2 test connector
|
|
+ * P3 - miniPCIe full card
|
|
+ * P4 - miniPCIe half card
|
|
+ */
|
|
+&usb3_phy1 {
|
|
+ vbus-supply = <®_usb2_vbus>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb3_1 {
|
|
+ fsl,permanently-attached;
|
|
+ fsl,disable-port-power-control;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_dwc3_1 {
|
|
+ dr_mode = "host";
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+/* microSD */
|
|
+&usdhc2 {
|
|
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
|
+ pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
|
|
+ pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
|
|
+ pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
|
|
+ cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
|
|
+ vmmc-supply = <®_usdhc2_vmmc>;
|
|
+ bus-width = <4>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&iomuxc {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pinctrl_hog>;
|
|
+
|
|
+ pinctrl_hog: hoggrp {
|
|
+ fsl,pins = <
|
|
+ MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13 0x40000040 /* GPIOA */
|
|
+ MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0x40000040 /* GPIOD */
|
|
+ MX8MP_IOMUXC_SAI1_RXD2__GPIO4_IO04 0x40000040 /* GPIOB */
|
|
+ MX8MP_IOMUXC_SAI1_RXD3__GPIO4_IO05 0x40000040 /* GPIOC */
|
|
+ MX8MP_IOMUXC_SAI2_TXD0__GPIO4_IO26 0x40000106 /* PCI_USBSEL */
|
|
+ MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x40000106 /* PCI_WDIS# */
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ pinctrl_gpio_leds: gpioledgrp {
|
|
+ fsl,pins = <
|
|
+ MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x6 /* LEDG */
|
|
+ MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x6 /* LEDR */
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ pinctrl_i2c2: i2c2grp {
|
|
+ fsl,pins = <
|
|
+ MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2
|
|
+ MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c2
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ pinctrl_i2c3: i2c3grp {
|
|
+ fsl,pins = <
|
|
+ MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL 0x400001c2
|
|
+ MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA 0x400001c2
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ pinctrl_pcie0: pciegrp {
|
|
+ fsl,pins = <
|
|
+ MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x106
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ pinctrl_pps: ppsgrp {
|
|
+ fsl,pins = <
|
|
+ MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x106
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ pinctrl_reg_usb2_en: regusb2grp {
|
|
+ fsl,pins = <
|
|
+ MX8MP_IOMUXC_SAI1_TXD0__GPIO4_IO12 0x6 /* USBHUB_RST# (ext p/u) */
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
|
|
+ fsl,pins = <
|
|
+ MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x40
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ pinctrl_spi2: spi2grp {
|
|
+ fsl,pins = <
|
|
+ MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x140
|
|
+ MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x140
|
|
+ MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x140
|
|
+ MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x140
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ pinctrl_uart1: uart1grp {
|
|
+ fsl,pins = <
|
|
+ MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140
|
|
+ MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ pinctrl_usdhc2: usdhc2grp {
|
|
+ fsl,pins = <
|
|
+ MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190
|
|
+ MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0
|
|
+ MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0
|
|
+ MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0
|
|
+ MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0
|
|
+ MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0
|
|
+ MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
|
|
+ fsl,pins = <
|
|
+ MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
|
|
+ MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
|
|
+ MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4
|
|
+ MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4
|
|
+ MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4
|
|
+ MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4
|
|
+ MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
|
|
+ fsl,pins = <
|
|
+ MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
|
|
+ MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
|
|
+ MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6
|
|
+ MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6
|
|
+ MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6
|
|
+ MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6
|
|
+ MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
|
|
+ >;
|
|
+ };
|
|
+
|
|
+ pinctrl_usdhc2_gpio: usdhc2gpiogrp {
|
|
+ fsl,pins = <
|
|
+ MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4
|
|
+ >;
|
|
+ };
|
|
+};
|
|
--- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw7905.dtsi
|
|
+++ /dev/null
|
|
@@ -1,309 +0,0 @@
|
|
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
-/*
|
|
- * Copyright 2023 Gateworks Corporation
|
|
- */
|
|
-
|
|
-#include <dt-bindings/gpio/gpio.h>
|
|
-#include <dt-bindings/leds/common.h>
|
|
-#include <dt-bindings/phy/phy-imx8-pcie.h>
|
|
-
|
|
-/ {
|
|
- led-controller {
|
|
- compatible = "gpio-leds";
|
|
- pinctrl-names = "default";
|
|
- pinctrl-0 = <&pinctrl_gpio_leds>;
|
|
-
|
|
- led-0 {
|
|
- function = LED_FUNCTION_STATUS;
|
|
- color = <LED_COLOR_ID_GREEN>;
|
|
- gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
|
|
- default-state = "on";
|
|
- linux,default-trigger = "heartbeat";
|
|
- };
|
|
-
|
|
- led-1 {
|
|
- function = LED_FUNCTION_STATUS;
|
|
- color = <LED_COLOR_ID_RED>;
|
|
- gpios = <&gpio4 27 GPIO_ACTIVE_HIGH>;
|
|
- default-state = "off";
|
|
- };
|
|
- };
|
|
-
|
|
- pcie0_refclk: pcie0-refclk {
|
|
- compatible = "fixed-clock";
|
|
- #clock-cells = <0>;
|
|
- clock-frequency = <100000000>;
|
|
- };
|
|
-
|
|
- pps {
|
|
- compatible = "pps-gpio";
|
|
- pinctrl-names = "default";
|
|
- pinctrl-0 = <&pinctrl_pps>;
|
|
- gpios = <&gpio4 21 GPIO_ACTIVE_HIGH>;
|
|
- status = "okay";
|
|
- };
|
|
-
|
|
- reg_usb2_vbus: regulator-usb2-vbus {
|
|
- pinctrl-names = "default";
|
|
- pinctrl-0 = <&pinctrl_reg_usb2_en>;
|
|
- compatible = "regulator-fixed";
|
|
- regulator-name = "usb2_vbus";
|
|
- gpio = <&gpio4 12 GPIO_ACTIVE_HIGH>;
|
|
- enable-active-high;
|
|
- regulator-min-microvolt = <5000000>;
|
|
- regulator-max-microvolt = <5000000>;
|
|
- };
|
|
-
|
|
- reg_usdhc2_vmmc: regulator-usdhc2 {
|
|
- pinctrl-names = "default";
|
|
- pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
|
|
- compatible = "regulator-fixed";
|
|
- regulator-name = "SD2_3P3V";
|
|
- regulator-min-microvolt = <3300000>;
|
|
- regulator-max-microvolt = <3300000>;
|
|
- gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
|
|
- enable-active-high;
|
|
- };
|
|
-};
|
|
-
|
|
-/* off-board header */
|
|
-&ecspi2 {
|
|
- pinctrl-names = "default";
|
|
- pinctrl-0 = <&pinctrl_spi2>;
|
|
- cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
|
|
- status = "okay";
|
|
-};
|
|
-
|
|
-&gpio4 {
|
|
- gpio-line-names =
|
|
- "", "", "", "",
|
|
- "", "", "", "",
|
|
- "", "", "", "",
|
|
- "", "gpioa", "", "",
|
|
- "", "", "", "",
|
|
- "", "", "", "",
|
|
- "", "", "", "",
|
|
- "", "", "", "";
|
|
-};
|
|
-
|
|
-&gpio4 {
|
|
- gpio-line-names =
|
|
- "", "gpiod", "", "",
|
|
- "gpiob", "gpioc", "", "",
|
|
- "", "", "", "",
|
|
- "", "", "", "",
|
|
- "", "", "", "",
|
|
- "", "", "", "",
|
|
- "", "", "pci_usb_sel", "",
|
|
- "pci_wdis#", "", "", "";
|
|
-};
|
|
-
|
|
-&i2c2 {
|
|
- clock-frequency = <400000>;
|
|
- pinctrl-names = "default";
|
|
- pinctrl-0 = <&pinctrl_i2c2>;
|
|
- status = "okay";
|
|
-
|
|
- eeprom@52 {
|
|
- compatible = "atmel,24c32";
|
|
- reg = <0x52>;
|
|
- pagesize = <32>;
|
|
- };
|
|
-};
|
|
-
|
|
-/* off-board header */
|
|
-&i2c3 {
|
|
- clock-frequency = <400000>;
|
|
- pinctrl-names = "default";
|
|
- pinctrl-0 = <&pinctrl_i2c3>;
|
|
- status = "okay";
|
|
-};
|
|
-
|
|
-&pcie_phy {
|
|
- fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
|
|
- fsl,clkreq-unsupported;
|
|
- clocks = <&pcie0_refclk>;
|
|
- clock-names = "ref";
|
|
- status = "okay";
|
|
-};
|
|
-
|
|
-&pcie {
|
|
- pinctrl-names = "default";
|
|
- pinctrl-0 = <&pinctrl_pcie0>;
|
|
- reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
|
|
- status = "okay";
|
|
-};
|
|
-
|
|
-/* GPS */
|
|
-&uart1 {
|
|
- pinctrl-names = "default";
|
|
- pinctrl-0 = <&pinctrl_uart1>;
|
|
- status = "okay";
|
|
-};
|
|
-
|
|
-/* USB1 - Type C front panel SINK port J14 */
|
|
-&usb3_0 {
|
|
- status = "okay";
|
|
-};
|
|
-
|
|
-&usb3_phy0 {
|
|
- status = "okay";
|
|
-};
|
|
-
|
|
-&usb_dwc3_0 {
|
|
- dr_mode = "peripheral";
|
|
- status = "okay";
|
|
-};
|
|
-
|
|
-/* USB2 4-port USB3.0 HUB:
|
|
- * P1 - USBC connector (host only)
|
|
- * P2 - USB2 test connector
|
|
- * P3 - miniPCIe full card
|
|
- * P4 - miniPCIe half card
|
|
- */
|
|
-&usb3_phy1 {
|
|
- vbus-supply = <®_usb2_vbus>;
|
|
- status = "okay";
|
|
-};
|
|
-
|
|
-&usb3_1 {
|
|
- fsl,permanently-attached;
|
|
- fsl,disable-port-power-control;
|
|
- status = "okay";
|
|
-};
|
|
-
|
|
-&usb_dwc3_1 {
|
|
- dr_mode = "host";
|
|
- status = "okay";
|
|
-};
|
|
-
|
|
-/* microSD */
|
|
-&usdhc2 {
|
|
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
|
- pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
|
|
- pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
|
|
- pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
|
|
- cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
|
|
- vmmc-supply = <®_usdhc2_vmmc>;
|
|
- bus-width = <4>;
|
|
- status = "okay";
|
|
-};
|
|
-
|
|
-&iomuxc {
|
|
- pinctrl-names = "default";
|
|
- pinctrl-0 = <&pinctrl_hog>;
|
|
-
|
|
- pinctrl_hog: hoggrp {
|
|
- fsl,pins = <
|
|
- MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13 0x40000040 /* GPIOA */
|
|
- MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0x40000040 /* GPIOD */
|
|
- MX8MP_IOMUXC_SAI1_RXD2__GPIO4_IO04 0x40000040 /* GPIOB */
|
|
- MX8MP_IOMUXC_SAI1_RXD3__GPIO4_IO05 0x40000040 /* GPIOC */
|
|
- MX8MP_IOMUXC_SAI2_TXD0__GPIO4_IO26 0x40000106 /* PCI_USBSEL */
|
|
- MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x40000106 /* PCI_WDIS# */
|
|
- >;
|
|
- };
|
|
-
|
|
- pinctrl_gpio_leds: gpioledgrp {
|
|
- fsl,pins = <
|
|
- MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x6 /* LEDG */
|
|
- MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x6 /* LEDR */
|
|
- >;
|
|
- };
|
|
-
|
|
- pinctrl_i2c2: i2c2grp {
|
|
- fsl,pins = <
|
|
- MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2
|
|
- MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c2
|
|
- >;
|
|
- };
|
|
-
|
|
- pinctrl_i2c3: i2c3grp {
|
|
- fsl,pins = <
|
|
- MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL 0x400001c2
|
|
- MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA 0x400001c2
|
|
- >;
|
|
- };
|
|
-
|
|
- pinctrl_pcie0: pciegrp {
|
|
- fsl,pins = <
|
|
- MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x106
|
|
- >;
|
|
- };
|
|
-
|
|
- pinctrl_pps: ppsgrp {
|
|
- fsl,pins = <
|
|
- MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x106
|
|
- >;
|
|
- };
|
|
-
|
|
- pinctrl_reg_usb2_en: regusb2grp {
|
|
- fsl,pins = <
|
|
- MX8MP_IOMUXC_SAI1_TXD0__GPIO4_IO12 0x6 /* USBHUB_RST# (ext p/u) */
|
|
- >;
|
|
- };
|
|
-
|
|
- pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
|
|
- fsl,pins = <
|
|
- MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x40
|
|
- >;
|
|
- };
|
|
-
|
|
- pinctrl_spi2: spi2grp {
|
|
- fsl,pins = <
|
|
- MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x140
|
|
- MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x140
|
|
- MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x140
|
|
- MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x140
|
|
- >;
|
|
- };
|
|
-
|
|
- pinctrl_uart1: uart1grp {
|
|
- fsl,pins = <
|
|
- MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140
|
|
- MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140
|
|
- >;
|
|
- };
|
|
-
|
|
- pinctrl_usdhc2: usdhc2grp {
|
|
- fsl,pins = <
|
|
- MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190
|
|
- MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0
|
|
- MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0
|
|
- MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0
|
|
- MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0
|
|
- MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0
|
|
- MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
|
|
- >;
|
|
- };
|
|
-
|
|
- pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
|
|
- fsl,pins = <
|
|
- MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
|
|
- MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
|
|
- MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4
|
|
- MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4
|
|
- MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4
|
|
- MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4
|
|
- MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
|
|
- >;
|
|
- };
|
|
-
|
|
- pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
|
|
- fsl,pins = <
|
|
- MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
|
|
- MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
|
|
- MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6
|
|
- MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6
|
|
- MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6
|
|
- MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6
|
|
- MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
|
|
- >;
|
|
- };
|
|
-
|
|
- pinctrl_usdhc2_gpio: usdhc2gpiogrp {
|
|
- fsl,pins = <
|
|
- MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4
|
|
- >;
|
|
- };
|
|
-};
|