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Deleted following upstreamed patches: bcm27xx: 950-0006-drm-vc4-hdmi-Fix-HPD-GPIO-detection.patch bcm27xx: 950-0420-drm-vc4-Adopt-the-dma-configuration-from-the-HVS-or-.patch bcm27xx: 950-0425-drm-vc4-A-present-but-empty-dmas-disables-audio.patch bcm27xx: 950-0432-vc4-drm-Avoid-full-hdmi-audio-fifo-writes.patch bcm27xx: 950-0433-vc4-drm-vc4_plane-Remove-subpixel-positioning-check.patch bcm27xx: 950-0435-drm-vc4-Correct-pixel-order-for-DSI0.patch bcm27xx: 950-0436-drm-vc4-Register-dsi0-as-the-correct-vc4-encoder-typ.patch bcm27xx: 950-0437-drm-vc4-Fix-dsi0-interrupt-support.patch bcm27xx: 950-0438-drm-vc4-Add-correct-stop-condition-to-vc4_dsi_encode.patch bcm27xx: 950-0443-drm-vc4-Fix-timings-for-interlaced-modes.patch bcm27xx: 950-0445-drm-vc4-Fix-margin-calculations-for-the-right-bottom.patch bcm27xx: 950-0475-drm-vc4-Reset-HDMI-MISC_CONTROL-register.patch bcm27xx: 950-0476-drm-vc4-Release-workaround-buffer-and-DMA-in-error-p.patch bcm27xx: 950-0477-drm-vc4-Correct-DSI-divider-calculations.patch bcm27xx: 950-0664-drm-vc4-dsi-Correct-max-divider-to-255-not-7.patch bcm53xx: 072-next-ARM_dts_BCM53015-add-mr26.patch mediatek: 920-linux-next-dts-mt7622-bpi-r64-fix-wps-button.patch Manually rebased following patches: bcm27xx: 950-0004-drm-vc4-hdmi-Remove-the-DDC-probing-for-status-detec.patch bcm27xx: 950-0700-net-phy-lan87xx-Decrease-phy-polling-rate.patch bcm27xx: 950-0711-drm-vc4-Rename-bridge-to-out_bridge.patch bcm27xx: 950-0713-drm-vc4-Remove-splitting-the-bridge-chain-from-the-d.patch bcm27xx: 950-0715-drm-vc4-Convert-vc4_dsi-to-using-a-bridge-instead-of.patch bcm27xx: 950-0787-vc4-drm-vc4_plane-Keep-fractional-source-coords-insi.patch bcm27xx: 950-0914-mmc-block-Don-t-do-single-sector-reads-during-recove.patch Runtime tested on turris-omnia and glinet-b1300. Tested-by: John Audia <therealgraysky@proton.me> [bcm2711/RPi4B, mt7622/RT3200] Signed-off-by: Petr Štetiar <ynezz@true.cz>
109 lines
3.8 KiB
Diff
109 lines
3.8 KiB
Diff
From 7760958a0fb50b0e20f88e220f55798ec154c41e Mon Sep 17 00:00:00 2001
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From: Dave Stevenson <dave.stevenson@raspberrypi.com>
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Date: Sat, 8 Jan 2022 13:24:10 +0000
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Subject: [PATCH] drm/vc4: Add alpha_blend_mode property to each plane.
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Move from only supporting the default of pre-multiplied
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alpha to supporting user specified blend mode using the
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standardised property.
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Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
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---
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drivers/gpu/drm/vc4/vc4_plane.c | 62 ++++++++++++++++++++++++++-------
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1 file changed, 49 insertions(+), 13 deletions(-)
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--- a/drivers/gpu/drm/vc4/vc4_plane.c
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+++ b/drivers/gpu/drm/vc4/vc4_plane.c
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@@ -664,6 +664,48 @@ static const u32 colorspace_coeffs[2][DR
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}
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};
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+static u32 vc4_hvs4_get_alpha_blend_mode(struct drm_plane_state *state)
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+{
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+ if (!state->fb->format->has_alpha)
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+ return VC4_SET_FIELD(SCALER_POS2_ALPHA_MODE_FIXED,
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+ SCALER_POS2_ALPHA_MODE);
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+
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+ switch (state->pixel_blend_mode) {
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+ case DRM_MODE_BLEND_PIXEL_NONE:
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+ return VC4_SET_FIELD(SCALER_POS2_ALPHA_MODE_FIXED,
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+ SCALER_POS2_ALPHA_MODE);
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+ default:
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+ case DRM_MODE_BLEND_PREMULTI:
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+ return VC4_SET_FIELD(SCALER_POS2_ALPHA_MODE_PIPELINE,
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+ SCALER_POS2_ALPHA_MODE) |
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+ SCALER_POS2_ALPHA_PREMULT;
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+ case DRM_MODE_BLEND_COVERAGE:
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+ return VC4_SET_FIELD(SCALER_POS2_ALPHA_MODE_PIPELINE,
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+ SCALER_POS2_ALPHA_MODE);
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+ }
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+}
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+
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+static u32 vc4_hvs5_get_alpha_blend_mode(struct drm_plane_state *state)
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+{
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+ if (!state->fb->format->has_alpha)
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+ return VC4_SET_FIELD(SCALER5_CTL2_ALPHA_MODE_FIXED,
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+ SCALER5_CTL2_ALPHA_MODE);
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+
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+ switch (state->pixel_blend_mode) {
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+ case DRM_MODE_BLEND_PIXEL_NONE:
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+ return VC4_SET_FIELD(SCALER5_CTL2_ALPHA_MODE_FIXED,
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+ SCALER5_CTL2_ALPHA_MODE);
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+ default:
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+ case DRM_MODE_BLEND_PREMULTI:
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+ return VC4_SET_FIELD(SCALER5_CTL2_ALPHA_MODE_PIPELINE,
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+ SCALER5_CTL2_ALPHA_MODE) |
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+ SCALER5_CTL2_ALPHA_PREMULT;
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+ case DRM_MODE_BLEND_COVERAGE:
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+ return VC4_SET_FIELD(SCALER5_CTL2_ALPHA_MODE_PIPELINE,
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+ SCALER5_CTL2_ALPHA_MODE);
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+ }
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+}
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+
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/* Writes out a full display list for an active plane to the plane's
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* private dlist state.
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*/
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@@ -946,13 +988,8 @@ static int vc4_plane_mode_set(struct drm
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/* Position Word 2: Source Image Size, Alpha */
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vc4_state->pos2_offset = vc4_state->dlist_count;
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vc4_dlist_write(vc4_state,
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- VC4_SET_FIELD(fb->format->has_alpha ?
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- SCALER_POS2_ALPHA_MODE_PIPELINE :
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- SCALER_POS2_ALPHA_MODE_FIXED,
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- SCALER_POS2_ALPHA_MODE) |
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(mix_plane_alpha ? SCALER_POS2_ALPHA_MIX : 0) |
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- (fb->format->has_alpha ?
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- SCALER_POS2_ALPHA_PREMULT : 0) |
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+ vc4_hvs4_get_alpha_blend_mode(state) |
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VC4_SET_FIELD(vc4_state->src_w[0],
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SCALER_POS2_WIDTH) |
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VC4_SET_FIELD(vc4_state->src_h[0],
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@@ -997,14 +1034,9 @@ static int vc4_plane_mode_set(struct drm
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vc4_dlist_write(vc4_state,
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VC4_SET_FIELD(state->alpha >> 4,
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SCALER5_CTL2_ALPHA) |
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- (fb->format->has_alpha ?
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- SCALER5_CTL2_ALPHA_PREMULT : 0) |
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+ vc4_hvs5_get_alpha_blend_mode(state) |
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(mix_plane_alpha ?
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- SCALER5_CTL2_ALPHA_MIX : 0) |
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- VC4_SET_FIELD(fb->format->has_alpha ?
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- SCALER5_CTL2_ALPHA_MODE_PIPELINE :
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- SCALER5_CTL2_ALPHA_MODE_FIXED,
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- SCALER5_CTL2_ALPHA_MODE)
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+ SCALER5_CTL2_ALPHA_MIX : 0)
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);
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/* Position Word 1: Scaled Image Dimensions. */
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@@ -1494,6 +1526,10 @@ struct drm_plane *vc4_plane_init(struct
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drm_plane_helper_add(plane, &vc4_plane_helper_funcs);
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drm_plane_create_alpha_property(plane);
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+ drm_plane_create_blend_mode_property(plane,
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+ BIT(DRM_MODE_BLEND_PIXEL_NONE) |
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+ BIT(DRM_MODE_BLEND_PREMULTI) |
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+ BIT(DRM_MODE_BLEND_COVERAGE));
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drm_plane_create_rotation_property(plane, DRM_MODE_ROTATE_0,
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DRM_MODE_ROTATE_0 |
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DRM_MODE_ROTATE_180 |
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