openwrt/target/linux/ramips/dts/mt7621_d-team_pbr-m1.dts

#include "mt7621.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>

/ {
	compatible = "d-team,pbr-m1", "mediatek,mt7621-soc";
	model = "PBR-M1";

	aliases {
		led-boot = &led_sys;
		led-failsafe = &led_sys;
		led-running = &led_sys;
		led-upgrade = &led_sys;
	};

	chosen {
		bootargs = "console=ttyS0,115200";
	};

	leds {
		compatible = "gpio-leds";

		power {
			function = LED_FUNCTION_POWER;
			color = <LED_COLOR_ID_BLUE>;
			gpios = <&gpio 31 GPIO_ACTIVE_LOW>;
			default-state = "on";
		};

		led_sys: sys {
			label = "blue:sys";
			gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
		};

		internet {
			label = "blue:internet";
			gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
		};

		wlan2g {
			label = "blue:wlan2g";
			gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
		};

		wlan5g {
			label = "blue:wlan5g";
			gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
		};
	};

	keys {
		compatible = "gpio-keys";

		reset {
			label = "reset";
			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};
	};

	gpio_export {
		compatible = "gpio-export";
		#size-cells = <0>;

		power_usb2 {
			gpio-export,name = "power_usb2";
			gpio-export,output = <1>;
			gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
		};

		power_usb3 {
			gpio-export,name = "power_usb3";
			gpio-export,output = <1>;
			gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
		};

		power_sata {
			gpio-export,name = "power_sata";
			gpio-export,output = <1>;
			gpios = <&gpio 27 GPIO_ACTIVE_HIGH>;
		};
	};

	beeper: beeper {
		compatible = "gpio-beeper";
		gpios = <&gpio 26 GPIO_ACTIVE_LOW>;
	};
};

&i2c {
	status = "okay";

	rtc@51 {
		status = "okay";
		compatible = "nxp,pcf8563";
		reg = <0x51>;
	};
};

&sdhci {
	status = "okay";
};

&spi0 {
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <50000000>;
		m25p,fast-read;
		broken-flash-reset;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "u-boot";
				reg = <0x0 0x30000>;
				read-only;
			};

			partition@30000 {
				label = "u-boot-env";
				reg = <0x30000 0x10000>;
				read-only;
			};

			partition@40000 {
				label = "factory";
				reg = <0x40000 0x10000>;
				read-only;

				nvmem-layout {
					compatible = "fixed-layout";
					#address-cells = <1>;
					#size-cells = <1>;

					eeprom_factory_0: eeprom@0 {
						reg = <0x0 0x400>;
					};

					eeprom_factory_8000: eeprom@8000 {
						reg = <0x8000 0x200>;
					};

					macaddr_factory_e000: macaddr@e000 {
						reg = <0xe000 0x6>;
					};

					macaddr_factory_e006: macaddr@e006 {
						reg = <0xe006 0x6>;
					};
				};
			};

			partition@50000 {
				compatible = "denx,uimage";
				label = "firmware";
				reg = <0x50000 0x1fb0000>;
			};
		};
	};
};

&pinctrl {
	uart3_gpio: uart3-gpio {
		uart3 {
			groups = "uart3";
			function = "gpio";
		};
	};
};

&pcie {
	status = "okay";
	pinctrl-0 = <&pcie_pins>, <&uart3_gpio>;
	reset-gpios = <&gpio 19 GPIO_ACTIVE_LOW>,
		      <&gpio 7 GPIO_ACTIVE_LOW>;
};

&pcie0 {
	mt76@0,0 {
		reg = <0x0000 0 0 0 0>;
		nvmem-cells = <&eeprom_factory_8000>;
		nvmem-cell-names = "eeprom";
		ieee80211-freq-limit = <5000000 6000000>;
	};
};

&pcie1 {
	mt76@0,0 {
		reg = <0x0000 0 0 0 0>;
		nvmem-cells = <&eeprom_factory_0>;
		nvmem-cell-names = "eeprom";
	};
};

&ethernet {
	pinctrl-0 = <&mdio_pins>, <&rgmii1_pins>;
};

&gmac0 {
	nvmem-cells = <&macaddr_factory_e000>;
	nvmem-cell-names = "mac-address";
};

&switch0 {
	ports {
		port@0 {
			status = "okay";
			label = "lan1";
		};

		port@1 {
			status = "okay";
			label = "lan2";
		};

		port@2 {
			status = "okay";
			label = "lan3";
		};

		port@3 {
			status = "okay";
			label = "lan4";
		};

		port@4 {
			status = "okay";
			label = "wan";
			nvmem-cells = <&macaddr_factory_e006>;
			nvmem-cell-names = "mac-address";
		};
	};
};

&state_default {
	gpio {
		groups = "wdt", "rgmii2", "jtag";
		function = "gpio";
	};
};