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05ed7dc50d
Patches automatically rebased. Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
188 lines
6.4 KiB
Diff
188 lines
6.4 KiB
Diff
From 36bb4f0ab8e7ef69cc11d4d888aa898223b0e901 Mon Sep 17 00:00:00 2001
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From: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
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Date: Mon, 1 Mar 2021 19:09:04 +0200
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Subject: [PATCH 153/247] ASoC: mchp-i2s-mcc: Add FIFOs support
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I2S-MCC found on SAMA7G5 includes 2 FIFOs (capture and playback). When
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FIFOs are enabled, bits I2SMCC_ISRA.TXLRDYx and I2SMCC_ISRA.TXRRDYx must
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not be used. Bits I2SMCC_ISRB.TXFFRDY and I2SMCC_ISRB.RXFFRDY must be used
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instead.
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Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
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Link: https://lore.kernel.org/r/20210301170905.835091-7-codrin.ciubotariu@microchip.com
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Signed-off-by: Mark Brown <broonie@kernel.org>
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---
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sound/soc/atmel/mchp-i2s-mcc.c | 76 +++++++++++++++++++++++++---------
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1 file changed, 56 insertions(+), 20 deletions(-)
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--- a/sound/soc/atmel/mchp-i2s-mcc.c
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+++ b/sound/soc/atmel/mchp-i2s-mcc.c
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@@ -176,7 +176,7 @@
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*/
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#define MCHP_I2SMCC_MRB_CRAMODE_REGULAR (1 << 0)
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-#define MCHP_I2SMCC_MRB_FIFOEN BIT(1)
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+#define MCHP_I2SMCC_MRB_FIFOEN BIT(4)
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#define MCHP_I2SMCC_MRB_DMACHUNK_MASK GENMASK(9, 8)
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#define MCHP_I2SMCC_MRB_DMACHUNK(no_words) \
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@@ -230,6 +230,7 @@ static const struct regmap_config mchp_i
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struct mchp_i2s_mcc_soc_data {
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unsigned int data_pin_pair_num;
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+ bool has_fifo;
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};
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struct mchp_i2s_mcc_dev {
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@@ -257,7 +258,7 @@ struct mchp_i2s_mcc_dev {
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static irqreturn_t mchp_i2s_mcc_interrupt(int irq, void *dev_id)
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{
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struct mchp_i2s_mcc_dev *dev = dev_id;
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- u32 sra, imra, srb, imrb, pendinga, pendingb, idra = 0;
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+ u32 sra, imra, srb, imrb, pendinga, pendingb, idra = 0, idrb = 0;
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irqreturn_t ret = IRQ_NONE;
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regmap_read(dev->regmap, MCHP_I2SMCC_IMRA, &imra);
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@@ -275,24 +276,36 @@ static irqreturn_t mchp_i2s_mcc_interrup
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* Tx/Rx ready interrupts are enabled when stopping only, to assure
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* availability and to disable clocks if necessary
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*/
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- idra |= pendinga & (MCHP_I2SMCC_INT_TXRDY_MASK(dev->channels) |
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- MCHP_I2SMCC_INT_RXRDY_MASK(dev->channels));
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- if (idra)
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+ if (dev->soc->has_fifo) {
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+ idrb |= pendingb & (MCHP_I2SMCC_INT_TXFFRDY |
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+ MCHP_I2SMCC_INT_RXFFRDY);
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+ } else {
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+ idra |= pendinga & (MCHP_I2SMCC_INT_TXRDY_MASK(dev->channels) |
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+ MCHP_I2SMCC_INT_RXRDY_MASK(dev->channels));
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+ }
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+ if (idra || idrb)
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ret = IRQ_HANDLED;
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- if ((imra & MCHP_I2SMCC_INT_TXRDY_MASK(dev->channels)) &&
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- (imra & MCHP_I2SMCC_INT_TXRDY_MASK(dev->channels)) ==
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- (idra & MCHP_I2SMCC_INT_TXRDY_MASK(dev->channels))) {
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+ if ((!dev->soc->has_fifo &&
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+ (imra & MCHP_I2SMCC_INT_TXRDY_MASK(dev->channels)) &&
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+ (imra & MCHP_I2SMCC_INT_TXRDY_MASK(dev->channels)) ==
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+ (idra & MCHP_I2SMCC_INT_TXRDY_MASK(dev->channels))) ||
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+ (dev->soc->has_fifo && imrb & MCHP_I2SMCC_INT_TXFFRDY)) {
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dev->tx_rdy = 1;
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wake_up_interruptible(&dev->wq_txrdy);
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}
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- if ((imra & MCHP_I2SMCC_INT_RXRDY_MASK(dev->channels)) &&
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- (imra & MCHP_I2SMCC_INT_RXRDY_MASK(dev->channels)) ==
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- (idra & MCHP_I2SMCC_INT_RXRDY_MASK(dev->channels))) {
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+ if ((!dev->soc->has_fifo &&
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+ (imra & MCHP_I2SMCC_INT_RXRDY_MASK(dev->channels)) &&
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+ (imra & MCHP_I2SMCC_INT_RXRDY_MASK(dev->channels)) ==
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+ (idra & MCHP_I2SMCC_INT_RXRDY_MASK(dev->channels))) ||
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+ (dev->soc->has_fifo && imrb & MCHP_I2SMCC_INT_RXFFRDY)) {
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dev->rx_rdy = 1;
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wake_up_interruptible(&dev->wq_rxrdy);
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}
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- regmap_write(dev->regmap, MCHP_I2SMCC_IDRA, idra);
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+ if (dev->soc->has_fifo)
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+ regmap_write(dev->regmap, MCHP_I2SMCC_IDRB, idrb);
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+ else
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+ regmap_write(dev->regmap, MCHP_I2SMCC_IDRA, idra);
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return ret;
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}
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@@ -664,6 +677,10 @@ static int mchp_i2s_mcc_hw_params(struct
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}
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}
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+ /* enable FIFO if available */
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+ if (dev->soc->has_fifo)
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+ mrb |= MCHP_I2SMCC_MRB_FIFOEN;
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+
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/*
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* If we are already running, the wanted setup must be
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* the same with the one that's currently ongoing
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@@ -726,8 +743,13 @@ static int mchp_i2s_mcc_hw_free(struct s
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if (err == 0) {
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dev_warn_once(dev->dev,
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"Timeout waiting for Tx ready\n");
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- regmap_write(dev->regmap, MCHP_I2SMCC_IDRA,
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- MCHP_I2SMCC_INT_TXRDY_MASK(dev->channels));
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+ if (dev->soc->has_fifo)
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+ regmap_write(dev->regmap, MCHP_I2SMCC_IDRB,
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+ MCHP_I2SMCC_INT_TXFFRDY);
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+ else
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+ regmap_write(dev->regmap, MCHP_I2SMCC_IDRA,
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+ MCHP_I2SMCC_INT_TXRDY_MASK(dev->channels));
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+
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dev->tx_rdy = 1;
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}
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} else {
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@@ -737,8 +759,12 @@ static int mchp_i2s_mcc_hw_free(struct s
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if (err == 0) {
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dev_warn_once(dev->dev,
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"Timeout waiting for Rx ready\n");
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- regmap_write(dev->regmap, MCHP_I2SMCC_IDRA,
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- MCHP_I2SMCC_INT_RXRDY_MASK(dev->channels));
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+ if (dev->soc->has_fifo)
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+ regmap_write(dev->regmap, MCHP_I2SMCC_IDRB,
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+ MCHP_I2SMCC_INT_RXFFRDY);
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+ else
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+ regmap_write(dev->regmap, MCHP_I2SMCC_IDRA,
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+ MCHP_I2SMCC_INT_RXRDY_MASK(dev->channels));
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dev->rx_rdy = 1;
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}
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}
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@@ -765,7 +791,7 @@ static int mchp_i2s_mcc_trigger(struct s
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struct mchp_i2s_mcc_dev *dev = snd_soc_dai_get_drvdata(dai);
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bool is_playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
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u32 cr = 0;
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- u32 iera = 0;
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+ u32 iera = 0, ierb = 0;
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u32 sr;
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int err;
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@@ -789,7 +815,10 @@ static int mchp_i2s_mcc_trigger(struct s
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* Enable Tx Ready interrupts on all channels
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* to assure all data is sent
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*/
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- iera = MCHP_I2SMCC_INT_TXRDY_MASK(dev->channels);
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+ if (dev->soc->has_fifo)
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+ ierb = MCHP_I2SMCC_INT_TXFFRDY;
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+ else
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+ iera = MCHP_I2SMCC_INT_TXRDY_MASK(dev->channels);
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} else if (!is_playback && (sr & MCHP_I2SMCC_SR_RXEN)) {
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cr = MCHP_I2SMCC_CR_RXDIS;
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dev->rx_rdy = 0;
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@@ -797,7 +826,10 @@ static int mchp_i2s_mcc_trigger(struct s
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* Enable Rx Ready interrupts on all channels
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* to assure all data is received
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*/
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- iera = MCHP_I2SMCC_INT_RXRDY_MASK(dev->channels);
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+ if (dev->soc->has_fifo)
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+ ierb = MCHP_I2SMCC_INT_RXFFRDY;
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+ else
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+ iera = MCHP_I2SMCC_INT_RXRDY_MASK(dev->channels);
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}
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break;
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default:
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@@ -815,7 +847,10 @@ static int mchp_i2s_mcc_trigger(struct s
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}
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}
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- regmap_write(dev->regmap, MCHP_I2SMCC_IERA, iera);
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+ if (dev->soc->has_fifo)
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+ regmap_write(dev->regmap, MCHP_I2SMCC_IERB, ierb);
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+ else
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+ regmap_write(dev->regmap, MCHP_I2SMCC_IERA, iera);
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regmap_write(dev->regmap, MCHP_I2SMCC_CR, cr);
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return 0;
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@@ -903,6 +938,7 @@ static struct mchp_i2s_mcc_soc_data mchp
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static struct mchp_i2s_mcc_soc_data mchp_i2s_mcc_sama7g5 = {
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.data_pin_pair_num = 4,
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+ .has_fifo = true,
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};
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static const struct of_device_id mchp_i2s_mcc_dt_ids[] = {
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