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05ed7dc50d
Patches automatically rebased. Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
46 lines
1.6 KiB
Diff
46 lines
1.6 KiB
Diff
From 268b36c42b7d1e480dd56ecfec626a46f4b5975e Mon Sep 17 00:00:00 2001
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From: Bhaskar Chowdhury <unixbhaskar@gmail.com>
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Date: Sat, 13 Mar 2021 11:02:22 +0530
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Subject: [PATCH 113/247] clk: at91: Trivial typo fixes in the file sama7g5.c
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s/critial/critical/ ......two different places
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s/parrent/parent/
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Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com>
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Link: https://lore.kernel.org/r/20210313053222.14706-1-unixbhaskar@gmail.com
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Acked-by: Randy Dunlap <rdunlap@infradead.org>
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Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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---
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drivers/clk/at91/sama7g5.c | 6 +++---
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1 file changed, 3 insertions(+), 3 deletions(-)
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--- a/drivers/clk/at91/sama7g5.c
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+++ b/drivers/clk/at91/sama7g5.c
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@@ -166,7 +166,7 @@ static const struct {
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.c = &pll_characteristics,
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.t = PLL_TYPE_FRAC,
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/*
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- * This feeds syspll_divpmcck which may feed critial parts
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+ * This feeds syspll_divpmcck which may feed critical parts
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* of the systems like timers. Therefore it should not be
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* disabled.
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*/
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@@ -178,7 +178,7 @@ static const struct {
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.c = &pll_characteristics,
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.t = PLL_TYPE_DIV,
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/*
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- * This may feed critial parts of the systems like timers.
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+ * This may feed critical parts of the systems like timers.
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* Therefore it should not be disabled.
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*/
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.f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
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@@ -455,7 +455,7 @@ static const struct {
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* @pp: PLL parents
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* @pp_mux_table: PLL parents mux table
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* @r: clock output range
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- * @pp_chg_id: id in parrent array of changeable PLL parent
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+ * @pp_chg_id: id in parent array of changeable PLL parent
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* @pp_count: PLL parents count
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* @id: clock id
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*/
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