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https://github.com/openwrt/openwrt.git
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ad962c90c3
The mxl-gpy driver apparently was built in the assumption that SGMII auto-negotiation is always switched on at the MAC. This may be true for few rather recent drivers (why?), but certainly isn't for most drivers unless 'managed = "in-band-status"' is set in device tree. Add patch to the mediatek target which reduces mxl-gpy to behave more like an ordinary PHY driver using out-of-band status. This allows to use these PHYs without rate-adaptation which seems to be at least partially broken/racy in some revisions of the PHY and/or internal PHY firmware. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
167 lines
4.8 KiB
Diff
167 lines
4.8 KiB
Diff
--- a/drivers/net/phy/mxl-gpy.c
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+++ b/drivers/net/phy/mxl-gpy.c
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@@ -126,6 +126,12 @@ static int gpy_config_init(struct phy_de
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if (ret < 0)
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return ret;
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+ /* Disable SGMII auto-negotiation */
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+ ret = phy_modify_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL,
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+ VSPEC1_SGMII_CTRL_ANEN, 0);
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+ if (ret < 0)
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+ return ret;
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+
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return gpy_led_write(phydev);
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}
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@@ -151,65 +157,6 @@ static int gpy_probe(struct phy_device *
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return 0;
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}
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-static bool gpy_sgmii_need_reaneg(struct phy_device *phydev)
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-{
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- int fw_ver, fw_type, fw_minor;
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- size_t i;
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-
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- fw_ver = phy_read(phydev, PHY_FWV);
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- if (fw_ver < 0)
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- return true;
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-
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- fw_type = FIELD_GET(PHY_FWV_TYPE_MASK, fw_ver);
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- fw_minor = FIELD_GET(PHY_FWV_MINOR_MASK, fw_ver);
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-
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- for (i = 0; i < ARRAY_SIZE(ver_need_sgmii_reaneg); i++) {
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- if (fw_type != ver_need_sgmii_reaneg[i].type)
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- continue;
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- if (fw_minor < ver_need_sgmii_reaneg[i].minor)
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- return true;
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- break;
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- }
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-
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- return false;
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-}
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-
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-static bool gpy_2500basex_chk(struct phy_device *phydev)
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-{
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- int ret;
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-
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- ret = phy_read(phydev, PHY_MIISTAT);
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- if (ret < 0) {
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- phydev_err(phydev, "Error: MDIO register access failed: %d\n",
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- ret);
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- return false;
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- }
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-
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- if (!(ret & PHY_MIISTAT_LS) ||
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- FIELD_GET(PHY_MIISTAT_SPD_MASK, ret) != PHY_MIISTAT_SPD_2500)
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- return false;
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-
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- phydev->speed = SPEED_2500;
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- phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
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- phy_modify_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL,
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- VSPEC1_SGMII_CTRL_ANEN, 0);
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- return true;
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-}
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-
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-static bool gpy_sgmii_aneg_en(struct phy_device *phydev)
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-{
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- int ret;
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-
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- ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL);
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- if (ret < 0) {
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- phydev_err(phydev, "Error: MMD register access failed: %d\n",
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- ret);
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- return true;
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- }
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-
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- return (ret & VSPEC1_SGMII_CTRL_ANEN) ? true : false;
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-}
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-
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static int gpy_config_aneg(struct phy_device *phydev)
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{
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bool changed = false;
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@@ -248,53 +195,11 @@ static int gpy_config_aneg(struct phy_de
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phydev->interface == PHY_INTERFACE_MODE_INTERNAL)
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return 0;
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- /* No need to trigger re-ANEG if link speed is 2.5G or SGMII ANEG is
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- * disabled.
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- */
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- if (!gpy_sgmii_need_reaneg(phydev) || gpy_2500basex_chk(phydev) ||
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- !gpy_sgmii_aneg_en(phydev))
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- return 0;
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-
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- /* There is a design constraint in GPY2xx device where SGMII AN is
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- * only triggered when there is change of speed. If, PHY link
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- * partner`s speed is still same even after PHY TPI is down and up
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- * again, SGMII AN is not triggered and hence no new in-band message
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- * from GPY to MAC side SGMII.
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- * This could cause an issue during power up, when PHY is up prior to
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- * MAC. At this condition, once MAC side SGMII is up, MAC side SGMII
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- * wouldn`t receive new in-band message from GPY with correct link
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- * status, speed and duplex info.
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- *
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- * 1) If PHY is already up and TPI link status is still down (such as
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- * hard reboot), TPI link status is polled for 4 seconds before
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- * retriggerring SGMII AN.
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- * 2) If PHY is already up and TPI link status is also up (such as soft
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- * reboot), polling of TPI link status is not needed and SGMII AN is
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- * immediately retriggered.
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- * 3) Other conditions such as PHY is down, speed change etc, skip
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- * retriggering SGMII AN. Note: in case of speed change, GPY FW will
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- * initiate SGMII AN.
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- */
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-
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- if (phydev->state != PHY_UP)
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- return 0;
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-
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- ret = phy_read_poll_timeout(phydev, MII_BMSR, ret, ret & BMSR_LSTATUS,
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- 20000, 4000000, false);
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- if (ret == -ETIMEDOUT)
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- return 0;
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- else if (ret < 0)
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- return ret;
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-
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- /* Trigger SGMII AN. */
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- return phy_modify_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL,
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- VSPEC1_SGMII_CTRL_ANRS, VSPEC1_SGMII_CTRL_ANRS);
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+ return 0;
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}
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static void gpy_update_interface(struct phy_device *phydev)
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{
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- int ret;
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-
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/* Interface mode is fixed for USXGMII and integrated PHY */
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if (phydev->interface == PHY_INTERFACE_MODE_USXGMII ||
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phydev->interface == PHY_INTERFACE_MODE_INTERNAL)
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@@ -306,29 +211,11 @@ static void gpy_update_interface(struct
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switch (phydev->speed) {
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case SPEED_2500:
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phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
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- ret = phy_modify_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL,
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- VSPEC1_SGMII_CTRL_ANEN, 0);
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- if (ret < 0)
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- phydev_err(phydev,
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- "Error: Disable of SGMII ANEG failed: %d\n",
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- ret);
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break;
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case SPEED_1000:
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case SPEED_100:
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case SPEED_10:
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phydev->interface = PHY_INTERFACE_MODE_SGMII;
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- if (gpy_sgmii_aneg_en(phydev))
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- break;
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- /* Enable and restart SGMII ANEG for 10/100/1000Mbps link speed
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- * if ANEG is disabled (in 2500-BaseX mode).
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- */
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- ret = phy_modify_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL,
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- VSPEC1_SGMII_ANEN_ANRS,
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- VSPEC1_SGMII_ANEN_ANRS);
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- if (ret < 0)
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- phydev_err(phydev,
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- "Error: Enable of SGMII ANEG failed: %d\n",
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- ret);
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break;
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}
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}
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