openwrt/target/linux/ramips/dts/AP7621-001.dts
Daniel Danzberger 029c970464 ramips: mt7621: Add new device AsiaRF AP7621-001
Hardware specs:
SoC:	Mediatek MT7621A
CPU:	4x 880Mhz
Cache:	32 KB I-Cache and 32 KB D-Cach
	256 KB L2 Cache (shared by Dual-Core)
RAM:	DDR3 512MB 16bits BUS
FLASH:	16MB
Switch:	Mediatek Gigabit Switch (1 x LAN, 1 x WAN)
USB:	1x 3.0
PCI:	3x Mini PCIe
GPS:	Quectel L70B
BTN:	Reset
LED:	- Power
	- Ethernet
	- Wifi
	- USB
UART:	UART is present as Pads with throughholes on the PCB.
	They are located on left side.
	3.3V - RX - GND - TX / 57600-8N1
	3.3V is the square pad

Installation:
The stock image is a modified openwrt and can be overflashed via
 # sysupgrade -F image.bin

Signed-off-by: Daniel Danzberger <daniel@dd-wrt.com>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
[removed unused label, formatting]
2019-06-25 15:02:21 +02:00

129 lines
1.9 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "mt7621.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "asiarf,ap7621-001", "mediatek,mt7621-soc";
model = "AsiaRF AP7621-001";
memory@0 {
device_type = "memory";
reg = <0x0 0x1c000000>, <0x20000000 0x4000000>;
};
chosen {
bootargs = "console=ttyS0,57600";
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
wlan1 {
label = "ap7621-001:orange:wlan1";
gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
};
wlan0 {
label = "ap7621-001:orange:wlan0";
gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
};
};
};
&sdhci {
status = "okay";
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <40000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x2000>;
};
partition@32000 {
label = "2860";
reg = <0x32000 0x4000>;
};
partition@36000 {
label = "rtdev";
reg = <0x36000 0x2000>;
};
partition@38000 {
label = "Reserve";
reg = <0x38000 0x8000>;
};
factory: partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
};
partition@50000 {
label = "firmware";
reg = <0x50000 0xfa0000>;
compatible = "denx,uimage";
};
partition@ff0000 {
label = "nvram";
reg = <0xff0000 0x10000>;
read-only;
};
};
};
};
&pcie {
status = "okay";
};
&ethernet {
mtd-mac-address = <&factory 0xe000>;
mediatek,portmap = "llllw";
};
&pinctrl {
state_default: pinctrl0 {
gpio {
ralink,group = "wdt", "jtag";
ralink,function = "gpio";
};
};
};