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7054721cf9
The uart node is enabled on all devices except one (GL-USB150 *).
Thus, let's not have a few hundred nodes to enable it, but do not
disable it in the first place.
Where the majority of devices is using it, also move the serial0
alias to the DTSI.
*) Since GL-USB150 even defines serial0 alias, the missing uart
is probably just a mistake. Anyway, disable it for now so this
patch stays cosmetic.
Apply this to 21.02 as well to remove an unnecessary backporting
pitfall.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
(cherry picked from commit 3a4b751110)
210 lines
3.1 KiB
Plaintext
210 lines
3.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "ar9344.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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model = "Western Digital My Net N750";
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compatible = "wd,mynet-n750", "qca,ar9344";
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chosen {
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bootargs = "console=ttyS0,115200n8";
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};
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aliases {
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led-boot = &led_power;
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led-failsafe = &led_power;
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led-running = &led_power;
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led-upgrade = &led_power;
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};
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leds {
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compatible = "gpio-leds";
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wifi {
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label = "blue:wireless";
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gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
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};
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internet {
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label = "blue:internet";
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gpios = <&gpio 12 GPIO_ACTIVE_HIGH>;
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};
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wps {
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label = "blue:wps";
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gpios = <&gpio 13 GPIO_ACTIVE_HIGH>;
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};
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led_power: power {
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label = "blue:power";
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gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
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};
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};
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keys {
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compatible = "gpio-keys";
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reset {
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linux,code = <KEY_RESTART>;
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gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
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};
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wps {
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&ref {
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clock-frequency = <40000000>;
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};
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&gpio {
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gpio_ext_lna0 {
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gpio-hog;
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gpios = <15 0>;
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output-high;
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line-name = "mynet-n750:ext:lna0";
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};
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gpio_ext_lna1 {
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gpio-hog;
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gpios = <18 0>;
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output-high;
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line-name = "mynet-n750:ext:lna1";
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};
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};
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&spi {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <25000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "bootloader";
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reg = <0x000000 0x40000>;
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read-only;
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};
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partition@40000 {
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label = "bdcfg";
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reg = <0x040000 0x10000>;
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read-only;
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};
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partition@50000 {
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label = "devdata";
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reg = <0x050000 0x10000>;
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read-only;
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};
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partition@60000 {
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label = "devconf";
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reg = <0x060000 0x10000>;
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read-only;
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};
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partition@70000 {
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compatible = "seama";
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label = "firmware";
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reg = <0x070000 0xf80000>;
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};
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art: partition@ff0000 {
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label = "art";
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reg = <0xff0000 0x010000>;
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read-only;
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};
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};
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};
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};
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&usb {
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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port@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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#trigger-source-cells = <0>;
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hub_port1: port@1 {
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reg = <1>;
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#trigger-source-cells = <0>;
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};
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hub_port2: port@2 {
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reg = <2>;
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#trigger-source-cells = <0>;
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};
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};
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};
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&usb_phy {
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status = "okay";
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};
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&pcie {
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status = "okay";
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wifi@0,0 {
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compatible = "pci168c,0033";
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reg = <0x0000 0 0 0 0>;
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qca,no-eeprom;
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};
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};
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&wmac {
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status = "okay";
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qca,no-eeprom;
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};
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&mdio0 {
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status = "okay";
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phy-mask = <0>;
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switch0@1f {
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compatible = "qca,ar8327";
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reg = <0x1f>;
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qca,ar8327-initvals = <
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0x04 0x07600000 /* PORT0 PAD MODE CTRL */
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0x10 0x80000080 /* POWER_ON_STRAP */
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0x50 0xc737c737 /* LED_CTRL0 */
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0x54 0x00000000 /* LED_CTRL1 */
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0x58 0x00000000 /* LED_CTRL2 */
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0x5c 0x0030c300 /* LED_CTRL3 */
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0x7c 0x0000007e /* PORT0_STATUS */
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>;
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};
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};
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ð0 {
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status = "okay";
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/* default for ar934x, except for 1000M */
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pll-data = <0x06000000 0x00000101 0x00001616>;
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phy-mode = "rgmii";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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