mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-24 15:56:49 +00:00
73eeac49be
In the past few years, we have received several reports about SPI Flash not working properly. This is caused by excessively fast clock frequency. It's really annoying to fix them one by one. Let's reduce these aggressive frequencies to 50 MHz. This is a safe and suggested value in the vendor SDK. Signed-off-by: Shiji Yang <yangshiji66@qq.com>
184 lines
3.1 KiB
Plaintext
184 lines
3.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
|
|
#include "mt7621.dtsi"
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
#include <dt-bindings/leds/common.h>
|
|
|
|
/ {
|
|
compatible = "winstars,ws-wn583a6", "mediatek,mt7621-soc";
|
|
model = "Winstars WS-WN583A6";
|
|
|
|
aliases {
|
|
led-boot = &led_status_red;
|
|
led-failsafe = &led_status_red;
|
|
led-running = &led_status_blue;
|
|
led-upgrade = &led_status_red;
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
night_light_white {
|
|
label = "white:night_light";
|
|
gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
led_status_blue: status_blue {
|
|
function = LED_FUNCTION_STATUS;
|
|
color = <LED_COLOR_ID_BLUE>;
|
|
gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
status_amber {
|
|
function = LED_FUNCTION_STATUS;
|
|
color = <LED_COLOR_ID_AMBER>;
|
|
gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
led_status_red: status_red {
|
|
function = LED_FUNCTION_STATUS;
|
|
color = <LED_COLOR_ID_RED>;
|
|
gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
|
|
keys {
|
|
compatible = "gpio-keys";
|
|
|
|
reset {
|
|
label = "reset";
|
|
gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_RESTART>;
|
|
};
|
|
|
|
wps {
|
|
label = "wps";
|
|
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_WPS_BUTTON>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&spi0 {
|
|
status = "okay";
|
|
|
|
flash@0 {
|
|
compatible = "jedec,spi-nor";
|
|
reg = <0>;
|
|
spi-max-frequency = <50000000>;
|
|
m25p,fast-read;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
partition@0 {
|
|
label = "bootloader";
|
|
reg = <0x0 0x30000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@30000 {
|
|
label = "config";
|
|
reg = <0x30000 0x10000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@40000 {
|
|
label = "factory";
|
|
reg = <0x40000 0x10000>;
|
|
read-only;
|
|
|
|
nvmem-layout {
|
|
compatible = "fixed-layout";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
eeprom_factory_0: eeprom@0 {
|
|
reg = <0x0 0x400>;
|
|
};
|
|
|
|
eeprom_factory_8000: eeprom@8000 {
|
|
reg = <0x8000 0x4da8>;
|
|
};
|
|
|
|
macaddr_factory_e000: macaddr@e000 {
|
|
reg = <0xe000 0x6>;
|
|
};
|
|
|
|
macaddr_factory_e006: macaddr@e006 {
|
|
reg = <0xe006 0x6>;
|
|
};
|
|
};
|
|
};
|
|
|
|
partition@50000 {
|
|
compatible = "denx,uimage";
|
|
label = "firmware";
|
|
reg = <0x50000 0x7b0000>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&pcie {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie0 {
|
|
wifi@0,0 {
|
|
compatible = "mediatek,mt76";
|
|
reg = <0x0000 0 0 0 0>;
|
|
nvmem-cells = <&eeprom_factory_0>;
|
|
nvmem-cell-names = "eeprom";
|
|
};
|
|
};
|
|
|
|
&pcie1 {
|
|
wifi@0,0 {
|
|
compatible = "mediatek,mt76";
|
|
reg = <0x0000 0 0 0 0>;
|
|
nvmem-cells = <&eeprom_factory_8000>;
|
|
nvmem-cell-names = "eeprom";
|
|
};
|
|
};
|
|
|
|
ðernet {
|
|
pinctrl-0 = <&mdio_pins>, <&rgmii1_pins>;
|
|
};
|
|
|
|
&gmac0 {
|
|
nvmem-cells = <&macaddr_factory_e000>;
|
|
nvmem-cell-names = "mac-address";
|
|
};
|
|
|
|
&switch0 {
|
|
ports {
|
|
port@0 {
|
|
status = "okay";
|
|
label = "wan";
|
|
nvmem-cells = <&macaddr_factory_e006>;
|
|
nvmem-cell-names = "mac-address";
|
|
};
|
|
|
|
port@1 {
|
|
status = "okay";
|
|
label = "lan";
|
|
};
|
|
};
|
|
};
|
|
|
|
&state_default {
|
|
gpio {
|
|
groups = "jtag", "wdt", "rgmii2";
|
|
function = "gpio";
|
|
};
|
|
};
|
|
|
|
&xhci {
|
|
status = "disabled";
|
|
};
|