openwrt/target/linux/ath79/dts/ar9331_tplink_tl-mr3040-v2.dts
Adrian Schmutzler ebc090e420 ath79: reduce spi-max-frequency to 50 MHz
The introduction of ebf0d8dade ("ath79: add new ar934x spi driver")
made the SPI memory unusable on devices with very high spi-max-frequency
(104 MHz).

Here's how the actual clock is calculated: (AHB_CLK/((CLOCK_DIVIDER+1)*2))
where AHB_CLK is a fixed clock (e.g. 200MHz on AR9331) and CLOCK_DIVIDER
is the parameter we can set. Highest clock according to this formula is
AHB_CLK/2 (100MHz, but that didn't work in device tests).
The next possible value is AHB_CLK/4 (50MHz). Speeds between 50 MHz and
100 MHz will be rounded down, so using values higher than 50 MHz does
not provide any benefit.

Consequently, this patch reduces spi-max-frequency for all devices with
values higher than 50 MHz to 50 MHz (effectively, this only affects
devices with 104 MHz before this patch).

Tested on GL.inet GL-AR150:
Boot fails with 104 MHz but is successful with both 50 MHz and 80 MHz
(fast-read), where the latter two yield identical read speeds.

Fixes: ebf0d8dade ("ath79: add new ar934x spi driver")

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2020-02-27 12:14:09 +01:00

170 lines
2.7 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "ar9331.dtsi"
/ {
model = "TP-Link TL-MR3040 V2";
compatible = "tplink,tl-mr3040-v2", "qca,ar9331";
aliases {
led-boot = &led_lan;
led-failsafe = &led_lan;
label-mac-device = &eth0;
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&switch_led_disable_pins>;
wlan {
label = "tp-link:green:wlan";
gpios = <&gpio 26 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
led_lan: lan {
label = "tp-link:green:lan";
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
};
led3g {
label = "tp-link:green:3g";
gpios = <&gpio 27 GPIO_ACTIVE_LOW>;
trigger-sources = <&hub_port>;
linux,default-trigger = "usbport";
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
debounce-interval = <60>;
};
sw1 {
label = "sw1";
linux,input-type = <EV_SW>;
linux,code = <BTN_0>;
gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
debounce-interval = <60>;
};
sw2 {
label = "sw2";
linux,input-type = <EV_SW>;
linux,code = <BTN_1>;
gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
debounce-interval = <60>;
};
};
reg_usb_vbus: reg_usb_vbus {
compatible = "regulator-fixed";
regulator-name = "usb_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio 18 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
&ref {
clock-frequency = <25000000>;
};
&uart {
status = "okay";
};
&gpio {
status = "okay";
};
&usb {
#address-cells = <1>;
#size-cells = <0>;
dr_mode = "host";
vbus-supply = <&reg_usb_vbus>;
status = "okay";
hub_port: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
&usb_phy {
status = "okay";
};
&spi {
status = "okay";
num-chipselects = <1>;
flash@0 {
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
reg = <0>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
uboot: partition@0 {
label = "u-boot";
reg = <0x000000 0x020000>;
read-only;
};
partition@20000 {
compatible = "tplink,firmware";
label = "firmware";
reg = <0x020000 0x3d0000>;
};
art: partition@3f0000 {
label = "art";
reg = <0x3f0000 0x010000>;
read-only;
};
};
};
};
&eth0 {
status = "okay";
mtd-mac-address = <&uboot 0x1fc00>;
gmac-config {
device = <&gmac>;
switch-phy-addr-swap = <0>;
switch-phy-swap = <0>;
};
};
&eth1 {
status = "okay";
compatible = "syscon", "simple-mfd";
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
mtd-mac-address = <&uboot 0x1fc00>;
};