mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-22 15:02:32 +00:00
2b75f108fb
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.1.63 Removed upstreamed: generic/backport-6.1/815-v6.6-2-leds-turris-omnia-Drop-unnecessary-mutex-locking.patch generic/backport-6.1/815-v6.7-1-leds-turris-omnia-Do-not-use-SMBUS-calls.patch ixp4xx/patches-6.1/0007-watchdog-ixp4xx-Make-sure-restart-always-works.patch Manually rebased: bcm27xx/patches-6.1/950-0606-hwrng-bcm2835-sleep-more-intelligently.patch All other patches automatically rebased. 1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.63&id=7d0e60e4ff840e97fb18afb2a7344442c10a6fdf 2. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.63&id=63cdeb20ee3bfef820b045b8d3b8395f9f815a74 3. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.63&id=8803da01fe1b4ca3d37745283f7e73c6c2558c0c Build system: x86/64 Build-tested: x86/64/AMD Cezanne Run-tested: x86/64/AMD Cezanne Signed-off-by: John Audia <therealgraysky@proton.me>
182 lines
7.2 KiB
Diff
182 lines
7.2 KiB
Diff
From f23375db001ec0fe9f565be75eff43adde15407e Mon Sep 17 00:00:00 2001
|
|
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
|
|
Date: Fri, 20 Jan 2023 10:20:35 +0100
|
|
Subject: [PATCH 03/15] clk: mediatek: clk-mtk: Propagate struct device for
|
|
composites
|
|
|
|
Like done for cpumux clocks, propagate struct device for composite
|
|
clocks registered through clk-mtk helpers to be able to get runtime
|
|
pm support for MTK clocks.
|
|
|
|
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
|
|
Tested-by: Miles Chen <miles.chen@mediatek.com>
|
|
Link: https://lore.kernel.org/r/20230120092053.182923-6-angelogioacchino.delregno@collabora.com
|
|
Tested-by: Mingming Su <mingming.su@mediatek.com>
|
|
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|
|
|
|
[daniel@makrotopia.org: remove parts not relevant for OpenWrt]
|
|
---
|
|
drivers/clk/mediatek/clk-mt2701.c | 10 ++++++----
|
|
drivers/clk/mediatek/clk-mt2712.c | 12 ++++++++----
|
|
drivers/clk/mediatek/clk-mt7622.c | 8 +++++---
|
|
drivers/clk/mediatek/clk-mt7629.c | 8 +++++---
|
|
drivers/clk/mediatek/clk-mtk.c | 11 ++++++-----
|
|
drivers/clk/mediatek/clk-mtk.h | 3 ++-
|
|
6 files changed, 32 insertions(+), 20 deletions(-)
|
|
|
|
--- a/drivers/clk/mediatek/clk-mt2701.c
|
|
+++ b/drivers/clk/mediatek/clk-mt2701.c
|
|
@@ -679,8 +679,9 @@ static int mtk_topckgen_init(struct plat
|
|
mtk_clk_register_factors(top_fixed_divs, ARRAY_SIZE(top_fixed_divs),
|
|
clk_data);
|
|
|
|
- mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes),
|
|
- base, &mt2701_clk_lock, clk_data);
|
|
+ mtk_clk_register_composites(&pdev->dev, top_muxes,
|
|
+ ARRAY_SIZE(top_muxes), base,
|
|
+ &mt2701_clk_lock, clk_data);
|
|
|
|
mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs),
|
|
base, &mt2701_clk_lock, clk_data);
|
|
@@ -905,8 +906,9 @@ static int mtk_pericfg_init(struct platf
|
|
mtk_clk_register_gates(&pdev->dev, node, peri_clks,
|
|
ARRAY_SIZE(peri_clks), clk_data);
|
|
|
|
- mtk_clk_register_composites(peri_muxs, ARRAY_SIZE(peri_muxs), base,
|
|
- &mt2701_clk_lock, clk_data);
|
|
+ mtk_clk_register_composites(&pdev->dev, peri_muxs,
|
|
+ ARRAY_SIZE(peri_muxs), base,
|
|
+ &mt2701_clk_lock, clk_data);
|
|
|
|
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
|
|
if (r)
|
|
--- a/drivers/clk/mediatek/clk-mt2712.c
|
|
+++ b/drivers/clk/mediatek/clk-mt2712.c
|
|
@@ -1320,8 +1320,9 @@ static int clk_mt2712_top_probe(struct p
|
|
mtk_clk_register_factors(top_early_divs, ARRAY_SIZE(top_early_divs),
|
|
top_clk_data);
|
|
mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), top_clk_data);
|
|
- mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), base,
|
|
- &mt2712_clk_lock, top_clk_data);
|
|
+ mtk_clk_register_composites(&pdev->dev, top_muxes,
|
|
+ ARRAY_SIZE(top_muxes), base,
|
|
+ &mt2712_clk_lock, top_clk_data);
|
|
mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs), base,
|
|
&mt2712_clk_lock, top_clk_data);
|
|
mtk_clk_register_gates(&pdev->dev, node, top_clks,
|
|
@@ -1395,8 +1396,11 @@ static int clk_mt2712_mcu_probe(struct p
|
|
|
|
clk_data = mtk_alloc_clk_data(CLK_MCU_NR_CLK);
|
|
|
|
- mtk_clk_register_composites(mcu_muxes, ARRAY_SIZE(mcu_muxes), base,
|
|
- &mt2712_clk_lock, clk_data);
|
|
+ r = mtk_clk_register_composites(&pdev->dev, mcu_muxes,
|
|
+ ARRAY_SIZE(mcu_muxes), base,
|
|
+ &mt2712_clk_lock, clk_data);
|
|
+ if (r)
|
|
+ dev_err(&pdev->dev, "Could not register composites: %d\n", r);
|
|
|
|
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
|
|
|
|
--- a/drivers/clk/mediatek/clk-mt7622.c
|
|
+++ b/drivers/clk/mediatek/clk-mt7622.c
|
|
@@ -615,8 +615,9 @@ static int mtk_topckgen_init(struct plat
|
|
mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs),
|
|
clk_data);
|
|
|
|
- mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes),
|
|
- base, &mt7622_clk_lock, clk_data);
|
|
+ mtk_clk_register_composites(&pdev->dev, top_muxes,
|
|
+ ARRAY_SIZE(top_muxes), base,
|
|
+ &mt7622_clk_lock, clk_data);
|
|
|
|
mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs),
|
|
base, &mt7622_clk_lock, clk_data);
|
|
@@ -685,7 +686,8 @@ static int mtk_pericfg_init(struct platf
|
|
mtk_clk_register_gates(&pdev->dev, node, peri_clks,
|
|
ARRAY_SIZE(peri_clks), clk_data);
|
|
|
|
- mtk_clk_register_composites(peri_muxes, ARRAY_SIZE(peri_muxes), base,
|
|
+ mtk_clk_register_composites(&pdev->dev, peri_muxes,
|
|
+ ARRAY_SIZE(peri_muxes), base,
|
|
&mt7622_clk_lock, clk_data);
|
|
|
|
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
|
|
--- a/drivers/clk/mediatek/clk-mt7629.c
|
|
+++ b/drivers/clk/mediatek/clk-mt7629.c
|
|
@@ -566,8 +566,9 @@ static int mtk_topckgen_init(struct plat
|
|
mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs),
|
|
clk_data);
|
|
|
|
- mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes),
|
|
- base, &mt7629_clk_lock, clk_data);
|
|
+ mtk_clk_register_composites(&pdev->dev, top_muxes,
|
|
+ ARRAY_SIZE(top_muxes), base,
|
|
+ &mt7629_clk_lock, clk_data);
|
|
|
|
clk_prepare_enable(clk_data->hws[CLK_TOP_AXI_SEL]->clk);
|
|
clk_prepare_enable(clk_data->hws[CLK_TOP_MEM_SEL]->clk);
|
|
@@ -613,7 +614,8 @@ static int mtk_pericfg_init(struct platf
|
|
mtk_clk_register_gates(&pdev->dev, node, peri_clks,
|
|
ARRAY_SIZE(peri_clks), clk_data);
|
|
|
|
- mtk_clk_register_composites(peri_muxes, ARRAY_SIZE(peri_muxes), base,
|
|
+ mtk_clk_register_composites(&pdev->dev, peri_muxes,
|
|
+ ARRAY_SIZE(peri_muxes), base,
|
|
&mt7629_clk_lock, clk_data);
|
|
|
|
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
|
|
--- a/drivers/clk/mediatek/clk-mtk.c
|
|
+++ b/drivers/clk/mediatek/clk-mtk.c
|
|
@@ -197,8 +197,8 @@ void mtk_clk_unregister_factors(const st
|
|
}
|
|
EXPORT_SYMBOL_GPL(mtk_clk_unregister_factors);
|
|
|
|
-static struct clk_hw *mtk_clk_register_composite(const struct mtk_composite *mc,
|
|
- void __iomem *base, spinlock_t *lock)
|
|
+static struct clk_hw *mtk_clk_register_composite(struct device *dev,
|
|
+ const struct mtk_composite *mc, void __iomem *base, spinlock_t *lock)
|
|
{
|
|
struct clk_hw *hw;
|
|
struct clk_mux *mux = NULL;
|
|
@@ -264,7 +264,7 @@ static struct clk_hw *mtk_clk_register_c
|
|
div_ops = &clk_divider_ops;
|
|
}
|
|
|
|
- hw = clk_hw_register_composite(NULL, mc->name, parent_names, num_parents,
|
|
+ hw = clk_hw_register_composite(dev, mc->name, parent_names, num_parents,
|
|
mux_hw, mux_ops,
|
|
div_hw, div_ops,
|
|
gate_hw, gate_ops,
|
|
@@ -308,7 +308,8 @@ static void mtk_clk_unregister_composite
|
|
kfree(mux);
|
|
}
|
|
|
|
-int mtk_clk_register_composites(const struct mtk_composite *mcs, int num,
|
|
+int mtk_clk_register_composites(struct device *dev,
|
|
+ const struct mtk_composite *mcs, int num,
|
|
void __iomem *base, spinlock_t *lock,
|
|
struct clk_hw_onecell_data *clk_data)
|
|
{
|
|
@@ -327,7 +328,7 @@ int mtk_clk_register_composites(const st
|
|
continue;
|
|
}
|
|
|
|
- hw = mtk_clk_register_composite(mc, base, lock);
|
|
+ hw = mtk_clk_register_composite(dev, mc, base, lock);
|
|
|
|
if (IS_ERR(hw)) {
|
|
pr_err("Failed to register clk %s: %pe\n", mc->name,
|
|
--- a/drivers/clk/mediatek/clk-mtk.h
|
|
+++ b/drivers/clk/mediatek/clk-mtk.h
|
|
@@ -149,7 +149,8 @@ struct mtk_composite {
|
|
.flags = 0, \
|
|
}
|
|
|
|
-int mtk_clk_register_composites(const struct mtk_composite *mcs, int num,
|
|
+int mtk_clk_register_composites(struct device *dev,
|
|
+ const struct mtk_composite *mcs, int num,
|
|
void __iomem *base, spinlock_t *lock,
|
|
struct clk_hw_onecell_data *clk_data);
|
|
void mtk_clk_unregister_composites(const struct mtk_composite *mcs, int num,
|