mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-23 15:32:33 +00:00
e39414ed07
Refreshed all patches Dropped upstreamed patches: 522-PCI-aardvark-fix-logic-in-PCI-configuration-read-write-functions.patch 523-PCI-aardvark-set-PIO_ADDR_LS-correctly-in-advk_pcie_rd_conf.patch 525-PCI-aardvark-use-isr1-instead-of-isr0-interrupt-in-legacy-irq-mode.patch 527-PCI-aardvark-fix-PCIe-max-read-request-size-setting.patch updated patches: 524-PCI-aardvark-set-host-and-device-to-the-same-MAX-payload-size.patch 030-USB-serial-option-fix-dwm-158-3g-modem-interface.patch Added new ARM64 symbol: CONFIG_ARM64_ERRATUM_1024718 Compile-tested on: cns3xxx, imx6, mvebu (arm64), x86_64 Runtime-tested on: cns3xxx, imx6, x86_64 Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
61 lines
1.6 KiB
Diff
61 lines
1.6 KiB
Diff
--- a/drivers/spi/spi-ath79.c
|
|
+++ b/drivers/spi/spi-ath79.c
|
|
@@ -102,9 +102,6 @@ static void ath79_spi_enable(struct ath7
|
|
/* save CTRL register */
|
|
sp->reg_ctrl = ath79_spi_rr(sp, AR71XX_SPI_REG_CTRL);
|
|
sp->ioc_base = ath79_spi_rr(sp, AR71XX_SPI_REG_IOC);
|
|
-
|
|
- /* TODO: setup speed? */
|
|
- ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, 0x43);
|
|
}
|
|
|
|
static void ath79_spi_disable(struct ath79_spi *sp)
|
|
@@ -204,6 +201,38 @@ static u32 ath79_spi_txrx_mode0(struct s
|
|
return ath79_spi_rr(sp, AR71XX_SPI_REG_RDS);
|
|
}
|
|
|
|
+static bool ath79_spi_flash_read_supported(struct spi_device *spi)
|
|
+{
|
|
+ if (spi->chip_select || gpio_is_valid(spi->cs_gpio))
|
|
+ return false;
|
|
+
|
|
+ return true;
|
|
+}
|
|
+
|
|
+static int ath79_spi_read_flash_data(struct spi_device *spi,
|
|
+ struct spi_flash_read_message *msg)
|
|
+{
|
|
+ struct ath79_spi *sp = ath79_spidev_to_sp(spi);
|
|
+
|
|
+ if (msg->addr_width > 3)
|
|
+ return -EOPNOTSUPP;
|
|
+
|
|
+ /* disable GPIO mode */
|
|
+ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0);
|
|
+
|
|
+ memcpy_fromio(msg->buf, sp->base + msg->from, msg->len);
|
|
+
|
|
+ /* enable GPIO mode */
|
|
+ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO);
|
|
+
|
|
+ /* restore IOC register */
|
|
+ ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
|
|
+
|
|
+ msg->retlen = msg->len;
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
static int ath79_spi_probe(struct platform_device *pdev)
|
|
{
|
|
struct spi_master *master;
|
|
@@ -232,6 +261,8 @@ static int ath79_spi_probe(struct platfo
|
|
master->bus_num = pdata->bus_num;
|
|
master->num_chipselect = pdata->num_chipselect;
|
|
}
|
|
+ master->spi_flash_read = ath79_spi_read_flash_data;
|
|
+ master->flash_read_supported = ath79_spi_flash_read_supported;
|
|
|
|
sp->bitbang.master = master;
|
|
sp->bitbang.chipselect = ath79_spi_chipselect;
|