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f577cb25c0
The following patches were dropped because they are already applied
upstream:
- 0038-MIPS-lantiq-fpi-on-ar9.patch
- 0039-MIPS-lantiq-initialize-usb-on-boot.patch
- 0042-USB-DWC2-big-endian-support.patch
- 0043-gpio-stp-xway-fix-phy-mask.patch
All other patches were simply refreshed, except the following:
- 0001-MIPS-lantiq-add-pcie-driver.patch
Changes to arch/mips/lantiq/xway/sysctrl.c (these changes disabled
some PMU gates for the vrx200 / VR9 SoCs) were removed since the
upstream kernel disables unused PMU gates automatically (since
95135bfa7ead1becc2879230f72583dde2b71a0c
"MIPS: Lantiq: Deactivate most of the devices by default").
- 0025-NET-MIPS-lantiq-adds-xrx200-net.patch
Since OpenWrt commit 55ba20afcc drivers
should use of_get_mac_address(). of_get_mac_address_mtd is not
available for drivers anymore since it's called automatically within
of_get_mac_address().
- 0028-NET-lantiq-various-etop-fixes.patch
Same changes as in 0025-NET-MIPS-lantiq-adds-xrx200-net.patch
While refreshing the kernel configuration SPI support had to be moved to
config-4.4 because otherwise M25P80 was disabled.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 48307
56 lines
1.6 KiB
Diff
56 lines
1.6 KiB
Diff
From 65df9d63eaee02c25e879b33dd42aceb78e57842 Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Sun, 28 Jul 2013 17:59:51 +0200
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Subject: [PATCH 16/36] MTD: lantiq: xway: add missing write_buf and read_buf
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to nand driver
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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drivers/mtd/nand/xway_nand.c | 28 ++++++++++++++++++++++++++++
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1 file changed, 28 insertions(+)
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--- a/drivers/mtd/nand/xway_nand.c
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+++ b/drivers/mtd/nand/xway_nand.c
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@@ -136,6 +136,32 @@ static unsigned char xway_read_byte(stru
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return ret;
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}
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+static void xway_read_buf(struct mtd_info *mtd, u_char *buf, int len)
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+{
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+ struct nand_chip *this = mtd->priv;
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+ unsigned long nandaddr = (unsigned long) this->IO_ADDR_R;
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+ unsigned long flags;
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+ int i;
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+
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+ spin_lock_irqsave(&ebu_lock, flags);
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+ for (i = 0; i < len; i++)
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+ buf[i] = ltq_r8((void __iomem *)(nandaddr | NAND_READ_DATA));
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+ spin_unlock_irqrestore(&ebu_lock, flags);
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+}
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+
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+static void xway_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
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+{
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+ struct nand_chip *this = mtd->priv;
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+ unsigned long nandaddr = (unsigned long) this->IO_ADDR_W;
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+ unsigned long flags;
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+ int i;
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+
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+ spin_lock_irqsave(&ebu_lock, flags);
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+ for (i = 0; i < len; i++)
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+ ltq_w8(buf[i], (void __iomem *)(nandaddr | NAND_WRITE_DATA));
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+ spin_unlock_irqrestore(&ebu_lock, flags);
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+}
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+
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static int xway_nand_probe(struct platform_device *pdev)
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{
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struct nand_chip *this = platform_get_drvdata(pdev);
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@@ -177,6 +203,8 @@ static struct platform_nand_data xway_na
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.dev_ready = xway_dev_ready,
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.select_chip = xway_select_chip,
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.read_byte = xway_read_byte,
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+ .read_buf = xway_read_buf,
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+ .write_buf = xway_write_buf,
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}
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};
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