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99545b4bb1
This target adds support for the Allwinner D1 RISC-V based SoCs.
- RISC-V single-core T-Head C906 (RV64GCV)
- Tensilica HiFi4 DSP
- DDR2/DDR3 support
- 10/100/1000M ethernet
- usual peripherals like USB2, SPI, I2C, PWM, etc.
Four boards are supported:
- Dongshan Nezha STU
- 512Mb RAM
- ethernet
- LicheePi RV Dock
- 512Mb RAM
- wireless-only (RTL8723DS)
- MangoPi MQ-Pro
- 512Mb RAM
- there are pads available for an SPI flash
- wireless-only (RTL8723DS)
- Nezha D1
- 512Mb/1Gb/2Gb RAM
- 256Mb NAND flash
- ethernet, wireless
Installation:
Standard SD-card installation via dd-ing the generated image to
an SD-card of at least 256Mb.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
58 lines
1.6 KiB
Diff
58 lines
1.6 KiB
Diff
From 9ea0c216d4f85a8ea888a38853e9573bbd9e995a Mon Sep 17 00:00:00 2001
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From: Samuel Holland <samuel@sholland.org>
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Date: Sun, 7 Aug 2022 21:09:39 -0500
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Subject: [PATCH 087/117] drm/sun4i: tcon: Always protect the LCD dotclock rate
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This handles the case where multiple CRTCs get their .mode_set function
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called during the same atomic commit, before rate protection is applied
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by enabling the CRTC.
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Signed-off-by: Samuel Holland <samuel@sholland.org>
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---
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drivers/gpu/drm/sun4i/sun4i_dotclock.c | 4 ++++
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drivers/gpu/drm/sun4i/sun4i_tcon.c | 6 ++++--
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2 files changed, 8 insertions(+), 2 deletions(-)
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--- a/drivers/gpu/drm/sun4i/sun4i_dotclock.c
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+++ b/drivers/gpu/drm/sun4i/sun4i_dotclock.c
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@@ -6,6 +6,7 @@
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* Maxime Ripard <maxime.ripard@free-electrons.com>
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*/
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+#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/regmap.h>
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@@ -194,12 +195,15 @@ int sun4i_dclk_create(struct device *dev
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if (IS_ERR(tcon->dclk))
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return PTR_ERR(tcon->dclk);
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+ clk_rate_exclusive_get(tcon->dclk);
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+
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return 0;
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}
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EXPORT_SYMBOL(sun4i_dclk_create);
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int sun4i_dclk_free(struct sun4i_tcon *tcon)
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{
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+ clk_rate_exclusive_put(tcon->dclk);
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clk_unregister(tcon->dclk);
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return 0;
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}
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--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
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+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
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@@ -108,9 +108,11 @@ static void sun4i_tcon_channel_set_statu
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if (enabled) {
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clk_prepare_enable(clk);
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- clk_rate_exclusive_get(clk);
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+ if (clk != tcon->dclk)
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+ clk_rate_exclusive_get(clk);
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} else {
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- clk_rate_exclusive_put(clk);
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+ if (clk != tcon->dclk)
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+ clk_rate_exclusive_put(clk);
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clk_disable_unprepare(clk);
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}
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}
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