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99545b4bb1
This target adds support for the Allwinner D1 RISC-V based SoCs.
- RISC-V single-core T-Head C906 (RV64GCV)
- Tensilica HiFi4 DSP
- DDR2/DDR3 support
- 10/100/1000M ethernet
- usual peripherals like USB2, SPI, I2C, PWM, etc.
Four boards are supported:
- Dongshan Nezha STU
- 512Mb RAM
- ethernet
- LicheePi RV Dock
- 512Mb RAM
- wireless-only (RTL8723DS)
- MangoPi MQ-Pro
- 512Mb RAM
- there are pads available for an SPI flash
- wireless-only (RTL8723DS)
- Nezha D1
- 512Mb/1Gb/2Gb RAM
- 256Mb NAND flash
- ethernet, wireless
Installation:
Standard SD-card installation via dd-ing the generated image to
an SD-card of at least 256Mb.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
157 lines
4.5 KiB
Diff
157 lines
4.5 KiB
Diff
From f666d95c1443854555044d3d4b52c463cf845ccc Mon Sep 17 00:00:00 2001
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From: Samuel Holland <samuel@sholland.org>
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Date: Sun, 17 Jul 2022 20:33:40 -0500
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Subject: [PATCH 020/117] regulator: dt-bindings: Add Allwinner D1 LDOs
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The Allwinner D1 SoC contains two pairs of in-package LDOs. One pair is
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for general purpose use. LDOA generally powers the board's 1.8 V rail.
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LDOB generally powers the in-package DRAM, where applicable.
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The other pair of LDOs powers the analog power domains inside the SoC,
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including the audio codec, thermal sensor, and ADCs. These LDOs require
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a 0.9 V bandgap voltage reference. The calibration value for the voltage
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reference is stored in an eFuse, accessed via an NVMEM cell.
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Neither LDO control register is in its own MMIO range; instead, each
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regulator device relies on a regmap/syscon exported by its parent.
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Series-changes: 2
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- Remove syscon property from bindings
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- Update binding examples to fix warnings and provide context
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Series-changes: 3
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- Add "reg" property to bindings
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- Add "unevaluatedProperties: true" to regulator nodes
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- Minor changes to regulator node name patterns
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- Remove system-ldos example (now added in patch 3)
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Series-changes: 4
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- Fix the order of the maintainer/description sections
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- Replace unevaluatedProperties with "additionalProperties: false"
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Signed-off-by: Samuel Holland <samuel@sholland.org>
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---
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.../allwinner,sun20i-d1-analog-ldos.yaml | 74 +++++++++++++++++++
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.../allwinner,sun20i-d1-system-ldos.yaml | 37 ++++++++++
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2 files changed, 111 insertions(+)
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create mode 100644 Documentation/devicetree/bindings/regulator/allwinner,sun20i-d1-analog-ldos.yaml
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create mode 100644 Documentation/devicetree/bindings/regulator/allwinner,sun20i-d1-system-ldos.yaml
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--- /dev/null
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+++ b/Documentation/devicetree/bindings/regulator/allwinner,sun20i-d1-analog-ldos.yaml
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@@ -0,0 +1,74 @@
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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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+%YAML 1.2
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+---
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+$id: http://devicetree.org/schemas/regulator/allwinner,sun20i-d1-analog-ldos.yaml#
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+$schema: http://devicetree.org/meta-schemas/core.yaml#
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+
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+title: Allwinner D1 Analog LDOs
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+
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+maintainers:
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+ - Samuel Holland <samuel@sholland.org>
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+
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+description:
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+ Allwinner D1 contains a set of LDOs which are designed to supply analog power
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+ inside and outside the SoC. They are controlled by a register within the audio
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+ codec MMIO space, but which is not part of the audio codec clock/reset domain.
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+
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+properties:
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+ compatible:
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+ enum:
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+ - allwinner,sun20i-d1-analog-ldos
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+
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+ reg:
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+ maxItems: 1
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+
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+ nvmem-cells:
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+ items:
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+ - description: NVMEM cell for the calibrated bandgap reference trim value
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+
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+ nvmem-cell-names:
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+ items:
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+ - const: bg_trim
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+
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+patternProperties:
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+ "^(a|hp)ldo$":
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+ type: object
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+ $ref: regulator.yaml#
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+ unevaluatedProperties: false
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+
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+required:
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+ - compatible
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+ - reg
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+ - nvmem-cells
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+ - nvmem-cell-names
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+
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+additionalProperties: false
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+
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+examples:
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+ - |
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+ audio-codec@2030000 {
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+ compatible = "simple-mfd", "syscon";
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+ reg = <0x2030000 0x1000>;
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+ ranges;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ regulators@2030348 {
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+ compatible = "allwinner,sun20i-d1-analog-ldos";
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+ reg = <0x2030348 0x4>;
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+ nvmem-cells = <&bg_trim>;
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+ nvmem-cell-names = "bg_trim";
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+
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+ reg_aldo: aldo {
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ };
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+
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+ reg_hpldo: hpldo {
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ };
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+ };
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+ };
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+
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+...
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--- /dev/null
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+++ b/Documentation/devicetree/bindings/regulator/allwinner,sun20i-d1-system-ldos.yaml
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@@ -0,0 +1,37 @@
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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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+%YAML 1.2
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+---
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+$id: http://devicetree.org/schemas/regulator/allwinner,sun20i-d1-system-ldos.yaml#
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+$schema: http://devicetree.org/meta-schemas/core.yaml#
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+
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+title: Allwinner D1 System LDOs
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+
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+maintainers:
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+ - Samuel Holland <samuel@sholland.org>
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+
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+description:
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+ Allwinner D1 contains a pair of general-purpose LDOs which are designed to
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+ supply power inside and outside the SoC. They are controlled by a register
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+ within the system control MMIO space.
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+
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+properties:
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+ compatible:
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+ enum:
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+ - allwinner,sun20i-d1-system-ldos
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+
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+ reg:
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+ maxItems: 1
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+
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+patternProperties:
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+ "^ldo[ab]$":
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+ type: object
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+ $ref: regulator.yaml#
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+ unevaluatedProperties: false
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+
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+required:
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+ - compatible
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+ - reg
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+
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+additionalProperties: false
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+
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+...
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