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dcd2367349
This is an automatically generated commit which aids following Kernel patch history, as git will see the move and copy as a rename thus defeating the purpose. See: https://lists.openwrt.org/pipermail/openwrt-devel/2023-October/041673.html for the original discussion. Signed-off-by: Antonio Flores <antflores627@gmail.com>
33 lines
1.0 KiB
Diff
33 lines
1.0 KiB
Diff
From 477ed3ade6a46e445b4e2348b710c51df4f6f4b1 Mon Sep 17 00:00:00 2001
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From: Manoj Sai <abbaraju.manojsai@amarulasolutions.com>
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Date: Thu, 23 Feb 2023 19:29:29 +0530
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Subject: [PATCH] arm64: dts: rockchip: Enable USB OTG for rk3566 Radxa CM3
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Enable USB OTG support for Radxa Compute Module 3 IO Board
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Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com>
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Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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Link: https://lore.kernel.org/r/20230223135929.630787-1-abbaraju.manojsai@amarulasolutions.com
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3-io.dts | 8 ++++++++
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1 file changed, 8 insertions(+)
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--- a/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3-io.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3-io.dts
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@@ -254,6 +254,14 @@
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status = "okay";
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};
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+&usb2phy0_otg {
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+ status = "okay";
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+};
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+
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+&usb_host0_xhci {
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+ status = "okay";
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+};
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+
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&vop {
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assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
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assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
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