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2abc55b2e2
All modifications made by update_kernel.sh/no human intervention needed Build system: x86_64 Build-tested: ipq806x/R7800, ath79/generic, bcm27xx/bcm2711 Run-tested: ipq806x/R7800 No dmesg regressions, everything functional Signed-off-by: John Audia <graysky@archlinux.us> [another refresh] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
26 lines
1.1 KiB
Diff
26 lines
1.1 KiB
Diff
From 0f90f5d6b3097fd6e7dea3389dc3d8f8894b345c Mon Sep 17 00:00:00 2001
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From: Haiying Wang <Haiying.Wang@freescale.com>
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Date: Wed, 22 Apr 2015 13:09:47 -0400
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Subject: [PATCH] arm64: add support to remap kernel cacheable memory to
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userspace
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Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
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Reviewed-by: Roy Pledge <roy.pledge@freescale.com>
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Reviewed-by: Stuart Yoder <stuart.yoder@freescale.com>
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---
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arch/arm64/include/asm/pgtable.h | 3 +++
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1 file changed, 3 insertions(+)
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--- a/arch/arm64/include/asm/pgtable.h
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+++ b/arch/arm64/include/asm/pgtable.h
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@@ -422,6 +422,9 @@ static inline pmd_t pmd_mkdevmap(pmd_t p
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__pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRnE) | PTE_PXN | PTE_UXN)
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#define pgprot_writecombine(prot) \
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__pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_NC) | PTE_PXN | PTE_UXN)
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+#define pgprot_cached(prot) \
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+ __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL) | \
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+ PTE_PXN | PTE_UXN)
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#define pgprot_device(prot) \
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__pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRE) | PTE_PXN | PTE_UXN)
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/*
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