openwrt/target/linux/ath79/dts/qca9558_tplink_rex5x.dtsi

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include "qca955x.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>

/ {
	aliases {
		led-boot = &led_power;
		led-failsafe = &led_power;
		led-running = &led_power;
		led-upgrade = &led_power;
		mdio-gpio0 = &mdio2;
		label-mac-device = &eth0;
	};

	leds {
		compatible = "gpio-leds";

		led_power: power {
			function = LED_FUNCTION_POWER;
			color = <LED_COLOR_ID_BLUE>;
			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
		};

		wlan2g {
			label = "blue:wlan2g";
			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "phy1tpt";
		};

		wlan5g {
			label = "blue:wlan5g";
			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "phy0tpt";
		};

		lan_link {
			label = "green:lan_link";
			gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
		};

		lan_data {
			label = "green:lan_data";
			gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
		};

		wps_blue {
			function = LED_FUNCTION_WPS;
			color = <LED_COLOR_ID_BLUE>;
			gpios = <&gpio 21 GPIO_ACTIVE_HIGH>;
		};

		wps_red {
			function = LED_FUNCTION_WPS;
			color = <LED_COLOR_ID_RED>;
			gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
		};
	};

	keys {
		compatible = "gpio-keys";

		reset {
			label = "Reset button";
			linux,code = <KEY_RESTART>;
			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
			debounce-interval = <60>;
		};

		leds {
			label = "LED control button";
			linux,code = <BTN_0>;
			gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
			debounce-interval = <60>;
		};

		wps {
			label = "WPS button";
			linux,code = <KEY_WPS_BUTTON>;
			gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
			debounce-interval = <60>;
		};
	};

	mdio2: mdio {
		compatible = "virtual,mdio-gpio";

		gpios = <&gpio 3 GPIO_ACTIVE_HIGH>, /* MDC */
			<&gpio 1 GPIO_ACTIVE_HIGH>; /* MDIO */
		#address-cells = <1>;
		#size-cells = <0>;

		phy4: ethernet-phy@4 {
			reg = <4>;
			reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
		};
	};
};

&pcie0 {
	status = "okay";

	wifi@0,0 {
		compatible = "qcom,ath10k";
		reg = <0x0000 0 0 0 0>;
		nvmem-cells = <&cal_art_5000>, <&macaddr_info_8 (-2)>;
		nvmem-cell-names = "calibration", "mac-address";
	};
};

&spi {
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <25000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "u-boot";
				reg = <0x000000 0x020000>;
				read-only;
			};

			partition@20000 {
				compatible = "tplink,firmware";
				label = "firmware";
				reg = <0x020000 0x5e0000>;
			};

			partition@600000 {
				label = "partition-table";
				reg = <0x600000 0x010000>;
				read-only;
			};

			partition@610000 {
				label = "info";
				reg = <0x610000 0x020000>;
				read-only;

				nvmem-layout {
					compatible = "fixed-layout";
					#address-cells = <1>;
					#size-cells = <1>;

					macaddr_info_8: macaddr@8 {
						compatible = "mac-base";
						reg = <0x8 0x6>;
						#nvmem-cell-cells = <1>;
					};
				};
			};

			partition@630000 {
				label = "config";
				reg = <0x630000 0x1c0000>;
				read-only;
			};

			partition@7f0000 {
				label = "art";
				reg = <0x7f0000 0x010000>;
				read-only;

				nvmem-layout {
					compatible = "fixed-layout";
					#address-cells = <1>;
					#size-cells = <1>;

					cal_art_1000: calibration@1000 {
						reg = <0x1000 0x440>;
					};

					cal_art_5000: calibration@5000 {
						reg = <0x5000 0x844>;
					};
				};
			};
		};
	};
};

&eth0 {
	status = "okay";

	phy-handle = <&phy4>;
	pll-data = <0xa6000000 0x00000101 0x00001616>;

	nvmem-cells = <&macaddr_info_8 0>;
	nvmem-cell-names = "mac-address";
};

&wmac {
	status = "okay";

	nvmem-cells = <&macaddr_info_8 (-1)>, <&cal_art_1000>;
	nvmem-cell-names = "mac-address", "calibration";
};