mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-30 10:39:04 +00:00
7758bda7d0
SVN-Revision: 11204
396 lines
11 KiB
Diff
396 lines
11 KiB
Diff
Index: linux-2.6.24.7/arch/arm/mach-ixp4xx/Kconfig
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===================================================================
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--- linux-2.6.24.7.orig/arch/arm/mach-ixp4xx/Kconfig
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+++ linux-2.6.24.7/arch/arm/mach-ixp4xx/Kconfig
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@@ -25,6 +25,14 @@ config MACH_AVILA
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Avila Network Platform. For more information on this platform,
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see <file:Documentation/arm/IXP4xx>.
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+config MACH_CAMBRIA
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+ bool "Cambria"
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+ select PCI
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+ help
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+ Say 'Y' here if you want your kernel to support the Gateworks
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+ Cambria series. For more information on this platform,
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+ see <file:Documentation/arm/IXP4xx>.
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+
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config MACH_LOFT
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bool "Loft"
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depends on MACH_AVILA
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@@ -200,7 +208,7 @@ config CPU_IXP46X
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config CPU_IXP43X
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bool
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- depends on MACH_KIXRP435
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+ depends on MACH_KIXRP435 || MACH_CAMBRIA
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default y
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config MACH_GTWX5715
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Index: linux-2.6.24.7/arch/arm/mach-ixp4xx/Makefile
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===================================================================
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--- linux-2.6.24.7.orig/arch/arm/mach-ixp4xx/Makefile
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+++ linux-2.6.24.7/arch/arm/mach-ixp4xx/Makefile
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@@ -7,6 +7,7 @@ obj-pci-n :=
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obj-pci-$(CONFIG_ARCH_IXDP4XX) += ixdp425-pci.o
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obj-pci-$(CONFIG_MACH_AVILA) += avila-pci.o
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+obj-pci-$(CONFIG_MACH_CAMBRIA) += cambria-pci.o
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obj-pci-$(CONFIG_MACH_IXDPG425) += ixdpg425-pci.o
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obj-pci-$(CONFIG_ARCH_ADI_COYOTE) += coyote-pci.o
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obj-pci-$(CONFIG_MACH_GTWX5715) += gtwx5715-pci.o
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@@ -28,6 +29,7 @@ obj-y += common.o
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obj-$(CONFIG_ARCH_IXDP4XX) += ixdp425-setup.o
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obj-$(CONFIG_MACH_AVILA) += avila-setup.o
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+obj-$(CONFIG_MACH_CAMBRIA) += cambria-setup.o
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obj-$(CONFIG_MACH_IXDPG425) += coyote-setup.o
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obj-$(CONFIG_ARCH_ADI_COYOTE) += coyote-setup.o
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obj-$(CONFIG_MACH_GTWX5715) += gtwx5715-setup.o
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Index: linux-2.6.24.7/arch/arm/mach-ixp4xx/cambria-pci.c
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===================================================================
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--- /dev/null
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+++ linux-2.6.24.7/arch/arm/mach-ixp4xx/cambria-pci.c
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@@ -0,0 +1,74 @@
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+/*
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+ * arch/arch/mach-ixp4xx/cambria-pci.c
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+ *
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+ * PCI setup routines for Gateworks Cambria series
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+ *
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+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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+ *
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+ * based on coyote-pci.c:
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+ * Copyright (C) 2002 Jungo Software Technologies.
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+ * Copyright (C) 2003 MontaVista Softwrae, Inc.
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+ *
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+ * Maintainer: Imre Kaloz <kaloz@openwrt.org>
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+ *
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/pci.h>
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+#include <linux/init.h>
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+#include <linux/irq.h>
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+
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+#include <asm/mach-types.h>
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+#include <asm/hardware.h>
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+#include <asm/irq.h>
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+
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+#include <asm/mach/pci.h>
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+
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+extern void ixp4xx_pci_preinit(void);
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+extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
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+extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys);
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+
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+void __init cambria_pci_preinit(void)
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+{
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+ set_irq_type(IRQ_IXP4XX_GPIO11, IRQT_LOW);
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+ set_irq_type(IRQ_IXP4XX_GPIO10, IRQT_LOW);
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+ set_irq_type(IRQ_IXP4XX_GPIO9, IRQT_LOW);
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+ set_irq_type(IRQ_IXP4XX_GPIO8, IRQT_LOW);
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+
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+ ixp4xx_pci_preinit();
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+}
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+
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+static int __init cambria_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
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+{
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+ if (slot == 1)
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+ return IRQ_IXP4XX_GPIO11;
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+ else if (slot == 2)
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+ return IRQ_IXP4XX_GPIO10;
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+ else if (slot == 3)
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+ return IRQ_IXP4XX_GPIO9;
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+ else if (slot == 4)
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+ return IRQ_IXP4XX_GPIO8;
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+ else return -1;
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+}
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+
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+struct hw_pci cambria_pci __initdata = {
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+ .nr_controllers = 1,
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+ .preinit = cambria_pci_preinit,
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+ .swizzle = pci_std_swizzle,
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+ .setup = ixp4xx_setup,
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+ .scan = ixp4xx_scan_bus,
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+ .map_irq = cambria_map_irq,
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+};
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+
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+int __init cambria_pci_init(void)
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+{
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+ if (machine_is_cambria())
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+ pci_common_init(&cambria_pci);
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+ return 0;
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+}
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+
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+subsys_initcall(cambria_pci_init);
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Index: linux-2.6.24.7/arch/arm/mach-ixp4xx/cambria-setup.c
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===================================================================
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--- /dev/null
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+++ linux-2.6.24.7/arch/arm/mach-ixp4xx/cambria-setup.c
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@@ -0,0 +1,250 @@
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+/*
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+ * arch/arm/mach-ixp4xx/cambria-setup.c
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+ *
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+ * Board setup for the Gateworks Cambria series
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+ *
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+ * Copyright (C) 2008 Imre Kaloz <Kaloz@openwrt.org>
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+ *
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+ * based on coyote-setup.c:
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+ * Copyright (C) 2003-2005 MontaVista Software, Inc.
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+ *
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+ * Author: Imre Kaloz <Kaloz@openwrt.org>
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/init.h>
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+#include <linux/device.h>
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+#include <linux/if_ether.h>
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+#include <linux/socket.h>
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+#include <linux/netdevice.h>
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+#include <linux/serial.h>
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+#include <linux/tty.h>
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+#include <linux/serial_8250.h>
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+#include <linux/slab.h>
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+#ifdef CONFIG_SENSORS_EEPROM
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+# include <linux/i2c.h>
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+# include <linux/eeprom.h>
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+#endif
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+
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+#include <linux/i2c-gpio.h>
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+#include <asm/types.h>
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+#include <asm/setup.h>
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+#include <asm/memory.h>
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+#include <asm/hardware.h>
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+#include <asm/irq.h>
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+#include <asm/mach-types.h>
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+#include <asm/mach/arch.h>
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+#include <asm/mach/flash.h>
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+
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+static struct flash_platform_data cambria_flash_data = {
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+ .map_name = "cfi_probe",
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+ .width = 2,
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+};
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+
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+static struct resource cambria_flash_resource = {
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+ .flags = IORESOURCE_MEM,
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+};
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+
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+static struct platform_device cambria_flash = {
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+ .name = "IXP4XX-Flash",
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+ .id = 0,
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+ .dev = {
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+ .platform_data = &cambria_flash_data,
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+ },
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+ .num_resources = 1,
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+ .resource = &cambria_flash_resource,
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+};
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+
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+static struct i2c_gpio_platform_data cambria_i2c_gpio_data = {
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+ .sda_pin = 7,
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+ .scl_pin = 6,
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+};
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+
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+static struct platform_device cambria_i2c_gpio = {
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+ .name = "i2c-gpio",
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+ .id = 0,
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+ .dev = {
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+ .platform_data = &cambria_i2c_gpio_data,
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+ },
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+};
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+
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+static struct resource cambria_uart_resource = {
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+ .start = IXP4XX_UART1_BASE_PHYS,
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+ .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
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+ .flags = IORESOURCE_MEM,
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+};
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+
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+static struct plat_serial8250_port cambria_uart_data[] = {
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+ {
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+ .mapbase = IXP4XX_UART1_BASE_PHYS,
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+ .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
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+ .irq = IRQ_IXP4XX_UART1,
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+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
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+ .iotype = UPIO_MEM,
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+ .regshift = 2,
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+ .uartclk = IXP4XX_UART_XTAL,
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+ },
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+ { },
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+};
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+
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+static struct platform_device cambria_uart = {
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+ .name = "serial8250",
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+ .id = PLAT8250_DEV_PLATFORM,
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+ .dev = {
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+ .platform_data = cambria_uart_data,
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+ },
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+ .num_resources = 1,
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+ .resource = &cambria_uart_resource,
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+};
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+
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+static struct resource cambria_pata_resources[] = {
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+ {
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+ .flags = IORESOURCE_MEM
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+ },
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+ {
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+ .flags = IORESOURCE_MEM,
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+ },
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+ {
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+ .name = "intrq",
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+ .start = IRQ_IXP4XX_GPIO12,
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+ .end = IRQ_IXP4XX_GPIO12,
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+ .flags = IORESOURCE_IRQ,
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+ },
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+};
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+
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+static struct ixp4xx_pata_data cambria_pata_data = {
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+ .cs0_bits = 0xbfff3c03,
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+ .cs1_bits = 0xbfff3c03,
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+};
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+
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+static struct platform_device cambria_pata = {
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+ .name = "pata_ixp4xx_cf",
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+ .id = 0,
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+ .dev.platform_data = &cambria_pata_data,
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+ .num_resources = ARRAY_SIZE(cambria_pata_resources),
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+ .resource = cambria_pata_resources,
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+};
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+
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+static struct eth_plat_info cambria_plat_eth[] = {
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+ {
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+ .phy = 2,
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+ .rxq = 4,
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+ .txreadyq = 21,
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+ }, {
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+ .phy = 1,
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+ .rxq = 2,
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+ .txreadyq = 19,
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+ }
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+};
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+
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+static struct platform_device cambria_eth[] = {
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+ {
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+ .name = "ixp4xx_eth",
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+ .id = IXP4XX_ETH_NPEC,
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+ .dev.platform_data = cambria_plat_eth,
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+ }, {
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+ .name = "ixp4xx_eth",
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+ .id = IXP4XX_ETH_NPEA,
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+ .dev.platform_data = cambria_plat_eth + 1,
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+ }
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+};
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+
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+#ifdef CONFIG_LEDS_IXP4XX
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+static struct platform_device cambria_leds_pld = {
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+ .name = "IXP4XX-PLD-LED",
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+ .id = -1,
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+ .num_resources = 0,
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+};
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+
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+static struct platform_device cambria_leds_mem = {
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+ .name = "IXP4XX-MEM-LED",
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+ .id = -1,
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+ .num_resources = 0,
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+};
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+#endif
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+
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+static struct platform_device *cambria_devices[] __initdata = {
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+ &cambria_i2c_gpio,
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+ &cambria_flash,
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+ &cambria_uart,
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+#ifdef CONFIG_LEDS_IXP4XX
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+ &cambria_leds_pld,
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+ &cambria_leds_mem,
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+#endif
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+ &cambria_eth[0],
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+ &cambria_eth[1],
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+};
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+
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+#ifdef CONFIG_SENSORS_EEPROM
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+static int cambria_eeprom_do(struct notifier_block *self, unsigned long event, void *t)
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+{
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+ struct eeprom_data *data = t;
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+ struct sockaddr address;
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+ struct net_device * netdev;
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+
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+ char macs[12];
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+
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+ /* The MACs are the first 12 bytes in the eeprom at address 0x51 */
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+ if (event == EEPROM_REGISTER && data->client.addr == 0x51) {
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+ data->attr->read(&data->client.dev.kobj, data->attr, macs, 0, 12);
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+ /* eth0 */
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+ memcpy(address.sa_data, macs, ETH_ALEN);
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+ memcpy(&cambria_plat_eth[0].hwaddr, macs, ETH_ALEN);
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+ if ( (netdev = dev_get_by_name(&init_net, "eth0")) )
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+ netdev->set_mac_address(netdev, &address);
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+
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+ /* eth1 */
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+ memcpy(address.sa_data, macs + ETH_ALEN, ETH_ALEN);
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+ memcpy(&cambria_plat_eth[1].hwaddr, macs + ETH_ALEN, ETH_ALEN);
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+ if ( (netdev = dev_get_by_name(&init_net, "eth1")) )
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+ netdev->set_mac_address(netdev, &address);
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+ }
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+
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+ return NOTIFY_DONE;
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+}
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+
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+static struct notifier_block cambria_eeprom_notifier = {
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+ .notifier_call = cambria_eeprom_do
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+};
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+#endif
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+
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+static void __init cambria_init(void)
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+{
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+ ixp4xx_sys_init();
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+
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+#ifdef CONFIG_SENSORS_EEPROM
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+ register_eeprom_notifier(&cambria_eeprom_notifier);
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+#endif
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+
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+ cambria_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
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+ cambria_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
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+
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+ *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
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+ *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
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+
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+ platform_add_devices(cambria_devices, ARRAY_SIZE(cambria_devices));
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+
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+ cambria_pata_resources[0].start = 0x53e00000;
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+ cambria_pata_resources[0].end = 0x53e3ffff;
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+
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+ cambria_pata_resources[1].start = 0x53e40000;
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+ cambria_pata_resources[1].end = 0x53e7ffff;
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+
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+ cambria_pata_data.cs0_cfg = IXP4XX_EXP_CS3;
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+ cambria_pata_data.cs1_cfg = IXP4XX_EXP_CS3;
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+
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+ platform_device_register(&cambria_pata);
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+}
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+
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+#ifdef CONFIG_MACH_CAMBRIA
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+MACHINE_START(CAMBRIA, "Gateworks Cambria series")
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+ /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
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+ .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
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+ .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
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+ .map_io = ixp4xx_map_io,
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+ .init_irq = ixp4xx_init_irq,
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+ .timer = &ixp4xx_timer,
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+ .boot_params = 0x0100,
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+ .init_machine = cambria_init,
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+MACHINE_END
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+#endif
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Index: linux-2.6.24.7/include/asm-arm/arch-ixp4xx/hardware.h
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===================================================================
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--- linux-2.6.24.7.orig/include/asm-arm/arch-ixp4xx/hardware.h
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+++ linux-2.6.24.7/include/asm-arm/arch-ixp4xx/hardware.h
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@@ -18,7 +18,7 @@
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#define __ASM_ARCH_HARDWARE_H__
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#define PCIBIOS_MIN_IO 0x00001000
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-#define PCIBIOS_MIN_MEM (cpu_is_ixp43x() ? 0x40000000 : 0x48000000)
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+#define PCIBIOS_MIN_MEM (cpu_is_ixp43x() ? 0x48000000 : 0x48000000)
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/*
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* We override the standard dma-mask routines for bouncing.
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