openwrt/target/linux/qualcommax/patches-6.1/0020-v6.3-PCI-qcom-Add-support-for-IPQ8074-Gen3-port.patch
John Audia b357564463 kernel: bump 6.1 to 6.1.57
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.1.57

Manually rebased:
	generic/pending-6.1/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch

Removed upstreamed:
	qualcommax/patches-6.1/0134-PCI-qcom-Fixing-broken-pcie-enumeration-for-2_3_3-co.patch[1]

All other patches automatically rebased.

1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.57&id=2dfb5f324d799f4545e17631415aba6d302a8e2b

Build system: x86/64
Build-tested: x86/64/AMD Cezanne
Run-tested: x86/64/AMD Cezanne

Reviewed-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: John Audia <therealgraysky@proton.me>
2023-10-14 15:51:53 +02:00

27 lines
1.2 KiB
Diff

From f356132229b18ceef5d5ef9103bbaa9bdeb84c8d Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Fri, 13 Jan 2023 17:44:47 +0100
Subject: [PATCH] PCI: qcom: Add IPQ8074 Gen3 port support
IPQ8074 has one Gen2 and one Gen3 port, with Gen2 port already supported.
Add compatible for Gen3 port which uses the same controller as IPQ6018.
Link: https://lore.kernel.org/r/20230113164449.906002-7-robimarko@gmail.com
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
drivers/pci/controller/dwc/pcie-qcom.c | 1 +
1 file changed, 1 insertion(+)
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -1762,6 +1762,7 @@ static const struct of_device_id qcom_pc
{ .compatible = "qcom,pcie-ipq8064", .data = &cfg_2_1_0 },
{ .compatible = "qcom,pcie-ipq8064-v2", .data = &cfg_2_1_0 },
{ .compatible = "qcom,pcie-ipq8074", .data = &cfg_2_3_3 },
+ { .compatible = "qcom,pcie-ipq8074-gen3", .data = &cfg_2_9_0 },
{ .compatible = "qcom,pcie-msm8996", .data = &cfg_2_3_2 },
{ .compatible = "qcom,pcie-qcs404", .data = &cfg_2_4_0 },
{ .compatible = "qcom,pcie-sa8540p", .data = &cfg_1_9_0 },