mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-25 08:21:14 +00:00
153 lines
4.6 KiB
Diff
153 lines
4.6 KiB
Diff
From 961a1f1ccbb2121a4e650cd64ca1f5c15b232e18 Mon Sep 17 00:00:00 2001
|
|
From: Kurt Mahan <kmahan@freescale.com>
|
|
Date: Thu, 29 May 2008 22:03:08 -0600
|
|
Subject: [PATCH] Update M547x/M548x memory map.
|
|
|
|
- Move internal memory
|
|
0xF0000000 MBAR
|
|
0xF1000000 MMUBAR
|
|
0xF3000000 RAMBAR0
|
|
0xF3001000 RAMBAR1
|
|
|
|
- Move KMAP area
|
|
0xD0000000 -> 0xDFFFFFFF
|
|
|
|
- Update pagefault code for KMAP area
|
|
|
|
LTIBName: m547x-8x-move-memmap
|
|
Signed-off-by: Kurt Mahan <kmahan@freescale.com>
|
|
---
|
|
arch/m68k/coldfire/head.S | 2 +-
|
|
arch/m68k/mm/cf-mmu.c | 20 ++++++++++----------
|
|
arch/m68k/mm/kmap.c | 18 +++++++++++++++---
|
|
include/asm-m68k/coldfire.h | 8 ++++----
|
|
include/asm-m68k/pgtable.h | 4 ++--
|
|
5 files changed, 32 insertions(+), 20 deletions(-)
|
|
|
|
--- a/arch/m68k/coldfire/head.S
|
|
+++ b/arch/m68k/coldfire/head.S
|
|
@@ -87,7 +87,7 @@
|
|
#else
|
|
#if defined(CONFIG_M54455)
|
|
#elif defined(CONFIG_M547X_8X)
|
|
-#define ACR0_DEFAULT #0xE000C040 /* ACR0 default value */
|
|
+#define ACR0_DEFAULT #0xF00FC040 /* ACR0 default value */
|
|
#define ACR1_DEFAULT #0x000FA008 /* ACR1 default value */
|
|
#define ACR2_DEFAULT #0x00000000 /* ACR2 default value */
|
|
#define ACR3_DEFAULT #0x000FA008 /* ACR3 default value */
|
|
--- a/arch/m68k/mm/cf-mmu.c
|
|
+++ b/arch/m68k/mm/cf-mmu.c
|
|
@@ -35,11 +35,9 @@
|
|
#include <asm/coldfire.h>
|
|
#include <asm/tlbflush.h>
|
|
|
|
-#if PAGE_OFFSET == CONFIG_SDRAM_BASE
|
|
-#define KERNRAM(x) ((x >= PAGE_OFFSET) && (x < (PAGE_OFFSET + CONFIG_SDRAM_SIZE)))
|
|
-#else
|
|
-#define KERNRAM(x) (x >= PAGE_OFFSET)
|
|
-#endif
|
|
+#define KMAPAREA(x) ((x >= KMAP_START) && ( x < KMAP_END))
|
|
+
|
|
+#undef DEBUG
|
|
|
|
mm_context_t next_mmu_context;
|
|
unsigned long context_map[LAST_CONTEXT / BITS_PER_LONG + 1];
|
|
@@ -162,7 +160,7 @@ int cf_tlb_miss(struct pt_regs *regs, in
|
|
mmuar = ( dtlb ) ? regs->mmuar
|
|
: regs->pc + (extension_word * sizeof(long));
|
|
|
|
- mm = (!user_mode(regs) && KERNRAM(mmuar)) ? &init_mm : current->mm;
|
|
+ mm = (!user_mode(regs) && KMAPAREA(mmuar)) ? &init_mm : current->mm;
|
|
|
|
if (!mm) {
|
|
local_irq_restore(flags);
|
|
@@ -181,7 +179,7 @@ int cf_tlb_miss(struct pt_regs *regs, in
|
|
return (-1);
|
|
}
|
|
|
|
- pte = (KERNRAM(mmuar)) ? pte_offset_kernel(pmd, mmuar)
|
|
+ pte = (KMAPAREA(mmuar)) ? pte_offset_kernel(pmd, mmuar)
|
|
: pte_offset_map(pmd, mmuar);
|
|
if (pte_none(*pte) || !pte_present(*pte)) {
|
|
local_irq_restore(flags);
|
|
@@ -198,7 +196,7 @@ int cf_tlb_miss(struct pt_regs *regs, in
|
|
|
|
set_pte(pte, pte_mkyoung(*pte));
|
|
asid = mm->context & 0xff;
|
|
- if (!pte_dirty(*pte) && !KERNRAM(mmuar))
|
|
+ if (!pte_dirty(*pte) && !KMAPAREA(mmuar))
|
|
set_pte(pte, pte_wrprotect(*pte));
|
|
|
|
*MMUTR = (mmuar & PAGE_MASK) | (asid << CF_ASID_MMU_SHIFT)
|
|
@@ -216,8 +214,10 @@ int cf_tlb_miss(struct pt_regs *regs, in
|
|
|
|
asm("nop");
|
|
|
|
- /*printk("cf_tlb_miss: va=%lx, pa=%lx\n", (mmuar & PAGE_MASK),
|
|
- (pte_val(*pte) & PAGE_MASK));*/
|
|
+#ifdef DEBUG
|
|
+ printk("cf_tlb_miss: va=%lx, pa=%lx\n", (mmuar & PAGE_MASK),
|
|
+ (pte_val(*pte) & PAGE_MASK));
|
|
+#endif
|
|
local_irq_restore(flags);
|
|
return (0);
|
|
}
|
|
--- a/arch/m68k/mm/kmap.c
|
|
+++ b/arch/m68k/mm/kmap.c
|
|
@@ -135,10 +135,22 @@ void __iomem *__ioremap(unsigned long ph
|
|
|
|
#ifdef CONFIG_M54455
|
|
if (physaddr >= 0xf0000000) {
|
|
- /* short circuit mappings for xf0000000 */
|
|
-#ifdef DEBUG
|
|
- printk(KERN_INFO "ioremap: short circuiting 0x%lx mapping\n", physaddr);
|
|
+ /*
|
|
+ * On the M5445x processors an ACR is setup to map
|
|
+ * the 0xF0000000 range into kernel memory as
|
|
+ * non-cacheable.
|
|
+ */
|
|
+ return (void __iomem *)physaddr;
|
|
+ }
|
|
#endif
|
|
+
|
|
+#ifdef CONFIG_M547X_8X
|
|
+ if (physaddr >= 0xf0000000) {
|
|
+ /*
|
|
+ * On the M547x/M548x processors an ACR is setup to map
|
|
+ * the 0xF0000000 range into kernel memory as
|
|
+ * non-cacheable.
|
|
+ */
|
|
return (void __iomem *)physaddr;
|
|
}
|
|
#endif
|
|
--- a/include/asm-m68k/coldfire.h
|
|
+++ b/include/asm-m68k/coldfire.h
|
|
@@ -6,10 +6,10 @@
|
|
#define MCF_RAMBAR1 0x40000000
|
|
#define MCF_SRAM 0x80000000
|
|
#elif defined(CONFIG_M547X_8X)
|
|
-#define MCF_MBAR 0xE0000000
|
|
-#define MCF_MMUBAR 0xE1000000
|
|
-#define MCF_RAMBAR0 0xE3000000
|
|
-#define MCF_RAMBAR1 0xE3001000
|
|
+#define MCF_MBAR 0xF0000000
|
|
+#define MCF_MMUBAR 0xF1000000
|
|
+#define MCF_RAMBAR0 0xF3000000
|
|
+#define MCF_RAMBAR1 0xF3001000
|
|
#endif
|
|
|
|
#define MCF_CLK CONFIG_MCFCLK
|
|
--- a/include/asm-m68k/pgtable.h
|
|
+++ b/include/asm-m68k/pgtable.h
|
|
@@ -73,8 +73,8 @@
|
|
#define KMAP_START 0x0DC00000
|
|
#define KMAP_END 0x0E000000
|
|
#elif defined(CONFIG_COLDFIRE)
|
|
-#define KMAP_START 0xe0000000
|
|
-#define KMAP_END 0xf0000000
|
|
+#define KMAP_START 0xd0000000
|
|
+#define KMAP_END 0xe0000000
|
|
#else
|
|
#define KMAP_START 0xd0000000
|
|
#define KMAP_END 0xf0000000
|