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236fcedc51
This reverts commit 78c2ec0f47.
The builders were failing with a segfault when generating the image
Signed-off-by: John Crispin <john@phrozen.org>
162 lines
3.8 KiB
C
162 lines
3.8 KiB
C
/*
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* Linksys WRT400N board support
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*
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* Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2009 Imre Kaloz <kaloz@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <asm/mach-ath79/ath79.h>
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#include "dev-ap9x-pci.h"
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#include "dev-eth.h"
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#include "dev-gpio-buttons.h"
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#include "dev-leds-gpio.h"
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#include "dev-m25p80.h"
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#include "machtypes.h"
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#define WRT400N_GPIO_LED_POWER 1
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#define WRT400N_GPIO_LED_WPS_BLUE 4
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#define WRT400N_GPIO_LED_WPS_AMBER 5
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#define WRT400N_GPIO_LED_WLAN 6
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#define WRT400N_GPIO_BTN_RESET 8
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#define WRT400N_GPIO_BTN_WLSEC 3
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#define WRT400N_KEYS_POLL_INTERVAL 20 /* msecs */
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#define WRT400N_KEYS_DEBOUNE_INTERVAL (3 * WRT400N_KEYS_POLL_INTERVAL)
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#define WRT400N_MAC_ADDR_OFFSET 0x120c
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#define WRT400N_CALDATA0_OFFSET 0x1000
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#define WRT400N_CALDATA1_OFFSET 0x5000
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static struct mtd_partition wrt400n_partitions[] = {
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{
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.name = "uboot",
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.offset = 0,
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.size = 0x030000,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "env",
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.offset = 0x030000,
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.size = 0x010000,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "linux",
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.offset = 0x040000,
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.size = 0x140000,
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}, {
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.name = "rootfs",
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.offset = 0x180000,
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.size = 0x630000,
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}, {
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.name = "nvram",
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.offset = 0x7b0000,
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.size = 0x010000,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "factory",
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.offset = 0x7c0000,
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.size = 0x010000,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "language",
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.offset = 0x7d0000,
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.size = 0x020000,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "caldata",
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.offset = 0x7f0000,
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.size = 0x010000,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "firmware",
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.offset = 0x040000,
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.size = 0x770000,
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}
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};
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static struct flash_platform_data wrt400n_flash_data = {
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.parts = wrt400n_partitions,
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.nr_parts = ARRAY_SIZE(wrt400n_partitions),
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};
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static struct gpio_led wrt400n_leds_gpio[] __initdata = {
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{
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.name = "wrt400n:blue:wps",
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.gpio = WRT400N_GPIO_LED_WPS_BLUE,
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.active_low = 1,
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}, {
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.name = "wrt400n:amber:wps",
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.gpio = WRT400N_GPIO_LED_WPS_AMBER,
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.active_low = 1,
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}, {
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.name = "wrt400n:blue:wlan",
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.gpio = WRT400N_GPIO_LED_WLAN,
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.active_low = 1,
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}, {
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.name = "wrt400n:blue:power",
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.gpio = WRT400N_GPIO_LED_POWER,
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.active_low = 0,
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.default_trigger = "default-on",
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}
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};
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static struct gpio_keys_button wrt400n_gpio_keys[] __initdata = {
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{
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.desc = "reset",
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.type = EV_KEY,
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.code = KEY_RESTART,
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.debounce_interval = WRT400N_KEYS_DEBOUNE_INTERVAL,
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.gpio = WRT400N_GPIO_BTN_RESET,
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.active_low = 1,
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}, {
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.desc = "wlsec",
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.type = EV_KEY,
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.code = KEY_WPS_BUTTON,
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.debounce_interval = WRT400N_KEYS_DEBOUNE_INTERVAL,
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.gpio = WRT400N_GPIO_BTN_WLSEC,
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.active_low = 1,
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}
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};
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static void __init wrt400n_setup(void)
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{
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u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
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u8 *mac = art + WRT400N_MAC_ADDR_OFFSET;
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ath79_register_mdio(0, 0x0);
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ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
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ath79_eth0_data.speed = SPEED_100;
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ath79_eth0_data.duplex = DUPLEX_FULL;
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ath79_init_mac(ath79_eth1_data.mac_addr, mac, 2);
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ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
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ath79_eth1_data.phy_mask = 0x10;
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ath79_register_eth(0);
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ath79_register_eth(1);
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ath79_register_m25p80(&wrt400n_flash_data);
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ath79_register_leds_gpio(-1, ARRAY_SIZE(wrt400n_leds_gpio),
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wrt400n_leds_gpio);
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ath79_register_gpio_keys_polled(-1, WRT400N_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(wrt400n_gpio_keys),
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wrt400n_gpio_keys);
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ap94_pci_init(art + WRT400N_CALDATA0_OFFSET, NULL,
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art + WRT400N_CALDATA1_OFFSET, NULL);
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}
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MIPS_MACHINE(ATH79_MACH_WRT400N, "WRT400N", "Linksys WRT400N", wrt400n_setup);
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