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b50fd8c2b3
Register SPI controllers through device tree. We will wire up the clocks at a later stage. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
83 lines
1.6 KiB
Plaintext
83 lines
1.6 KiB
Plaintext
/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "brcm,bcm6328";
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aliases {
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gpio0 = &gpio0;
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spi1 = &hsspi;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "brcm,bmips4350", "mips,mips4Kc";
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device_type = "cpu";
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reg = <0>;
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};
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};
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cpu_intc: interrupt-controller {
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#address-cells = <0>;
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compatible = "mti,cpu-interrupt-controller";
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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memory { device_type = "memory"; reg = <0 0>; };
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ubus@10000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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compatible = "simple-bus";
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interrupt-parent = <&periph_intc>;
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ext_intc: interrupt-controller@10000018 {
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compatible = "brcm,bcm6345-ext-intc";
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reg = <0x10000018 0x4>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupts = <24>, <25>, <26>, <27>;
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};
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periph_intc: interrupt-controller@10000020 {
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compatible = "brcm,bcm6345-l1-intc";
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reg = <0x10000020 0x10>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&cpu_intc>;
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interrupts = <2>;
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};
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gpio0: gpio-controller@10000084 {
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compatible = "brcm,bcm6345-gpio";
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reg = <0x10000084 4>, <0x1000008c 4>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&ext_intc>;
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interrupts = <3 0>, <2 0>, <0 0>, <1 0>;
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interrupt-names = "gpio12", "gpio15",
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"gpio23", "gpio24";
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};
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hsspi: spi@10001000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "brcm,bcm6328-hsspi";
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reg = <0x10001000 0x600>;
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interrupts = <29>;
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/* clocks = <&clkctl 9>; */
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};
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};
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};
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