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https://github.com/openwrt/openwrt.git
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237 lines
6.6 KiB
Diff
237 lines
6.6 KiB
Diff
From e99a187b5c5f60fe55ca586f82ac1a3557fb166a Mon Sep 17 00:00:00 2001
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From: Ray Jui <rjui@broadcom.com>
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Date: Fri, 16 Oct 2015 08:18:24 -0500
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Subject: [PATCH 7/7] PCI: iproc: Add outbound mapping support
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Certain SoCs require the PCIe outbound mapping to be configured in
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software. Add support for those chips.
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[jonmason: Use %pap format when printing size_t to avoid warnings in 32-bit
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build.]
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[arnd: Use div64_u64() instead of "%" to avoid __aeabi_uldivmod link error
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in 32-bit build.]
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Signed-off-by: Ray Jui <rjui@broadcom.com>
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Signed-off-by: Jon Mason <jonmason@broadcom.com>
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Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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---
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drivers/pci/host/pcie-iproc-platform.c | 27 ++++++++
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drivers/pci/host/pcie-iproc.c | 115 +++++++++++++++++++++++++++++++++
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drivers/pci/host/pcie-iproc.h | 17 +++++
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3 files changed, 159 insertions(+)
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--- a/drivers/pci/host/pcie-iproc-platform.c
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+++ b/drivers/pci/host/pcie-iproc-platform.c
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@@ -54,6 +54,33 @@ static int iproc_pcie_pltfm_probe(struct
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return -ENOMEM;
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}
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+ if (of_property_read_bool(np, "brcm,pcie-ob")) {
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+ u32 val;
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+
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+ ret = of_property_read_u32(np, "brcm,pcie-ob-axi-offset",
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+ &val);
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+ if (ret) {
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+ dev_err(pcie->dev,
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+ "missing brcm,pcie-ob-axi-offset property\n");
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+ return ret;
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+ }
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+ pcie->ob.axi_offset = val;
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+
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+ ret = of_property_read_u32(np, "brcm,pcie-ob-window-size",
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+ &val);
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+ if (ret) {
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+ dev_err(pcie->dev,
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+ "missing brcm,pcie-ob-window-size property\n");
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+ return ret;
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+ }
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+ pcie->ob.window_size = (resource_size_t)val * SZ_1M;
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+
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+ if (of_property_read_bool(np, "brcm,pcie-ob-oarr-size"))
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+ pcie->ob.set_oarr_size = true;
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+
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+ pcie->need_ob_cfg = true;
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+ }
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+
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/* PHY use is optional */
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pcie->phy = devm_phy_get(&pdev->dev, "pcie-phy");
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if (IS_ERR(pcie->phy)) {
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--- a/drivers/pci/host/pcie-iproc.c
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+++ b/drivers/pci/host/pcie-iproc.c
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@@ -66,6 +66,18 @@
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#define PCIE_DL_ACTIVE_SHIFT 2
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#define PCIE_DL_ACTIVE BIT(PCIE_DL_ACTIVE_SHIFT)
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+#define OARR_VALID_SHIFT 0
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+#define OARR_VALID BIT(OARR_VALID_SHIFT)
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+#define OARR_SIZE_CFG_SHIFT 1
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+#define OARR_SIZE_CFG BIT(OARR_SIZE_CFG_SHIFT)
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+
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+#define OARR_LO(window) (0xd20 + (window) * 8)
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+#define OARR_HI(window) (0xd24 + (window) * 8)
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+#define OMAP_LO(window) (0xd40 + (window) * 8)
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+#define OMAP_HI(window) (0xd44 + (window) * 8)
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+
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+#define MAX_NUM_OB_WINDOWS 2
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+
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static inline struct iproc_pcie *iproc_data(struct pci_bus *bus)
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{
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struct iproc_pcie *pcie;
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@@ -212,6 +224,101 @@ static void iproc_pcie_enable(struct ipr
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writel(SYS_RC_INTX_MASK, pcie->base + SYS_RC_INTX_EN);
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}
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+/**
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+ * Some iProc SoCs require the SW to configure the outbound address mapping
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+ *
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+ * Outbound address translation:
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+ *
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+ * iproc_pcie_address = axi_address - axi_offset
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+ * OARR = iproc_pcie_address
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+ * OMAP = pci_addr
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+ *
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+ * axi_addr -> iproc_pcie_address -> OARR -> OMAP -> pci_address
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+ */
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+static int iproc_pcie_setup_ob(struct iproc_pcie *pcie, u64 axi_addr,
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+ u64 pci_addr, resource_size_t size)
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+{
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+ struct iproc_pcie_ob *ob = &pcie->ob;
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+ unsigned i;
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+ u64 max_size = (u64)ob->window_size * MAX_NUM_OB_WINDOWS;
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+ u64 remainder;
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+
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+ if (size > max_size) {
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+ dev_err(pcie->dev,
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+ "res size 0x%pap exceeds max supported size 0x%llx\n",
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+ &size, max_size);
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+ return -EINVAL;
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+ }
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+
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+ div64_u64_rem(size, ob->window_size, &remainder);
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+ if (remainder) {
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+ dev_err(pcie->dev,
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+ "res size %pap needs to be multiple of window size %pap\n",
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+ &size, &ob->window_size);
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+ return -EINVAL;
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+ }
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+
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+ if (axi_addr < ob->axi_offset) {
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+ dev_err(pcie->dev,
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+ "axi address %pap less than offset %pap\n",
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+ &axi_addr, &ob->axi_offset);
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+ return -EINVAL;
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+ }
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+
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+ /*
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+ * Translate the AXI address to the internal address used by the iProc
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+ * PCIe core before programming the OARR
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+ */
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+ axi_addr -= ob->axi_offset;
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+
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+ for (i = 0; i < MAX_NUM_OB_WINDOWS; i++) {
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+ writel(lower_32_bits(axi_addr) | OARR_VALID |
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+ (ob->set_oarr_size ? 1 : 0), pcie->base + OARR_LO(i));
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+ writel(upper_32_bits(axi_addr), pcie->base + OARR_HI(i));
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+ writel(lower_32_bits(pci_addr), pcie->base + OMAP_LO(i));
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+ writel(upper_32_bits(pci_addr), pcie->base + OMAP_HI(i));
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+
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+ size -= ob->window_size;
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+ if (size == 0)
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+ break;
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+
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+ axi_addr += ob->window_size;
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+ pci_addr += ob->window_size;
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+ }
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+
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+ return 0;
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+}
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+
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+static int iproc_pcie_map_ranges(struct iproc_pcie *pcie,
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+ struct list_head *resources)
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+{
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+ struct resource_entry *window;
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+ int ret;
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+
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+ resource_list_for_each_entry(window, resources) {
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+ struct resource *res = window->res;
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+ u64 res_type = resource_type(res);
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+
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+ switch (res_type) {
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+ case IORESOURCE_IO:
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+ case IORESOURCE_BUS:
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+ break;
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+ case IORESOURCE_MEM:
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+ ret = iproc_pcie_setup_ob(pcie, res->start,
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+ res->start - window->offset,
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+ resource_size(res));
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+ if (ret)
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+ return ret;
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+ break;
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+ default:
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+ dev_err(pcie->dev, "invalid resource %pR\n", res);
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+ return -EINVAL;
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+ }
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+ }
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+
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+ return 0;
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+}
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+
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int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res)
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{
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int ret;
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@@ -235,6 +342,14 @@ int iproc_pcie_setup(struct iproc_pcie *
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iproc_pcie_reset(pcie);
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+ if (pcie->need_ob_cfg) {
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+ ret = iproc_pcie_map_ranges(pcie, res);
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+ if (ret) {
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+ dev_err(pcie->dev, "map failed\n");
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+ goto err_power_off_phy;
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+ }
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+ }
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+
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#ifdef CONFIG_ARM
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pcie->sysdata.private_data = pcie;
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sysdata = &pcie->sysdata;
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--- a/drivers/pci/host/pcie-iproc.h
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+++ b/drivers/pci/host/pcie-iproc.h
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@@ -15,6 +15,19 @@
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#define _PCIE_IPROC_H
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/**
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+ * iProc PCIe outbound mapping
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+ * @set_oarr_size: indicates the OARR size bit needs to be set
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+ * @axi_offset: offset from the AXI address to the internal address used by
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+ * the iProc PCIe core
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+ * @window_size: outbound window size
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+ */
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+struct iproc_pcie_ob {
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+ bool set_oarr_size;
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+ resource_size_t axi_offset;
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+ resource_size_t window_size;
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+};
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+
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+/**
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* iProc PCIe device
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* @dev: pointer to device data structure
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* @base: PCIe host controller I/O register base
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@@ -23,6 +36,8 @@
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* @phy: optional PHY device that controls the Serdes
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* @irqs: interrupt IDs
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* @map_irq: function callback to map interrupts
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+ * @need_ob_cfg: indidates SW needs to configure the outbound mapping window
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+ * @ob: outbound mapping parameters
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*/
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struct iproc_pcie {
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struct device *dev;
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@@ -33,6 +48,8 @@ struct iproc_pcie {
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struct pci_bus *root_bus;
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struct phy *phy;
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int (*map_irq)(const struct pci_dev *, u8, u8);
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+ bool need_ob_cfg;
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+ struct iproc_pcie_ob ob;
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};
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int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res);
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