mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-23 15:32:33 +00:00
53f338be43
Add pending patch for ipq4019 MDIO MDC rate fix. The divisor was never actually set resulting in the MDC rate running at a very low speed. The same MDIO is used on ipq807x where Aquantia PHY are commonly used where MDIO is used to load the PHY firmware. Running at higher speed is required to make the firmware load faster as it does reduce load time from 60+ second to 5-6 seconds. Add as pending as upstream there seems to be some conflicts with quic and me and it might take lots of time before this is effectively merged upstream. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
26 lines
770 B
Diff
26 lines
770 B
Diff
From 3b5a603bf66236b956287909556fd7ad4904450c Mon Sep 17 00:00:00 2001
|
|
From: Christian Marangi <ansuelsmth@gmail.com>
|
|
Date: Wed, 24 Jan 2024 19:38:01 +0100
|
|
Subject: [PATCH 3/3] arm64: dts: qcom: ipq8074: add clock-frequency to MDIO
|
|
node
|
|
|
|
Add clock-frequency to MDIO node to set the MDC rate to 6.25Mhz instead
|
|
of using the default value of 390KHz from MDIO default divider.
|
|
|
|
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
---
|
|
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 2 ++
|
|
1 file changed, 2 insertions(+)
|
|
|
|
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
|
|
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
|
|
@@ -263,6 +263,8 @@
|
|
clocks = <&gcc GCC_MDIO_AHB_CLK>;
|
|
clock-names = "gcc_mdio_ahb_clk";
|
|
|
|
+ clock-frequency = <6250000>;
|
|
+
|
|
status = "disabled";
|
|
};
|
|
|