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In preparation to update to upcoming Linux 6.6.33 move accepted patches from mediatek target to backport folder, so moving to newer Linux 6.6 releases becomes easier and also other patches on top can be applied more easily. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
129 lines
4.1 KiB
Diff
129 lines
4.1 KiB
Diff
From 4d572e867bdb372bb4add39a0fa495c6a9c9a8da Mon Sep 17 00:00:00 2001
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From: Daniel Golle <daniel@makrotopia.org>
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Date: Wed, 8 May 2024 11:43:56 +0100
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Subject: [PATCH] net: ethernet: mediatek: use ADMAv1 instead of ADMAv2.0 on
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MT7981 and MT7986
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ADMAv2.0 is plagued by RX hangs which can't easily detected and happen upon
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receival of a corrupted Ethernet frame.
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Use ADMAv1 instead which is also still present and usable, and doesn't
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suffer from that problem.
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Fixes: 197c9e9b17b1 ("net: ethernet: mtk_eth_soc: introduce support for mt7986 chipset")
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Co-developed-by: Lorenzo Bianconi <lorenzo@kernel.org>
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Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
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Signed-off-by: Daniel Golle <daniel@makrotopia.org>
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Link: https://lore.kernel.org/r/57cef74bbd0c243366ad1ff4221e3f72f437ec80.1715164770.git.daniel@makrotopia.org
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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drivers/net/ethernet/mediatek/mtk_eth_soc.c | 46 ++++++++++-----------
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1 file changed, 23 insertions(+), 23 deletions(-)
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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@@ -110,16 +110,16 @@ static const struct mtk_reg_map mt7986_r
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.tx_irq_mask = 0x461c,
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.tx_irq_status = 0x4618,
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.pdma = {
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- .rx_ptr = 0x6100,
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- .rx_cnt_cfg = 0x6104,
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- .pcrx_ptr = 0x6108,
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- .glo_cfg = 0x6204,
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- .rst_idx = 0x6208,
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- .delay_irq = 0x620c,
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- .irq_status = 0x6220,
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- .irq_mask = 0x6228,
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- .adma_rx_dbg0 = 0x6238,
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- .int_grp = 0x6250,
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+ .rx_ptr = 0x4100,
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+ .rx_cnt_cfg = 0x4104,
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+ .pcrx_ptr = 0x4108,
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+ .glo_cfg = 0x4204,
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+ .rst_idx = 0x4208,
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+ .delay_irq = 0x420c,
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+ .irq_status = 0x4220,
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+ .irq_mask = 0x4228,
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+ .adma_rx_dbg0 = 0x4238,
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+ .int_grp = 0x4250,
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},
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.qdma = {
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.qtx_cfg = 0x4400,
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@@ -1106,7 +1106,7 @@ static bool mtk_rx_get_desc(struct mtk_e
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rxd->rxd1 = READ_ONCE(dma_rxd->rxd1);
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rxd->rxd3 = READ_ONCE(dma_rxd->rxd3);
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rxd->rxd4 = READ_ONCE(dma_rxd->rxd4);
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- if (mtk_is_netsys_v2_or_greater(eth)) {
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+ if (mtk_is_netsys_v3_or_greater(eth)) {
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rxd->rxd5 = READ_ONCE(dma_rxd->rxd5);
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rxd->rxd6 = READ_ONCE(dma_rxd->rxd6);
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}
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@@ -2024,7 +2024,7 @@ static int mtk_poll_rx(struct napi_struc
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break;
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/* find out which mac the packet come from. values start at 1 */
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- if (mtk_is_netsys_v2_or_greater(eth)) {
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+ if (mtk_is_netsys_v3_or_greater(eth)) {
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u32 val = RX_DMA_GET_SPORT_V2(trxd.rxd5);
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switch (val) {
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@@ -2136,7 +2136,7 @@ static int mtk_poll_rx(struct napi_struc
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skb->dev = netdev;
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bytes += skb->len;
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- if (mtk_is_netsys_v2_or_greater(eth)) {
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+ if (mtk_is_netsys_v3_or_greater(eth)) {
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reason = FIELD_GET(MTK_RXD5_PPE_CPU_REASON, trxd.rxd5);
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hash = trxd.rxd5 & MTK_RXD5_FOE_ENTRY;
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if (hash != MTK_RXD5_FOE_ENTRY)
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@@ -2686,7 +2686,7 @@ static int mtk_rx_alloc(struct mtk_eth *
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rxd->rxd3 = 0;
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rxd->rxd4 = 0;
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- if (mtk_is_netsys_v2_or_greater(eth)) {
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+ if (mtk_is_netsys_v3_or_greater(eth)) {
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rxd->rxd5 = 0;
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rxd->rxd6 = 0;
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rxd->rxd7 = 0;
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@@ -3889,7 +3889,7 @@ static int mtk_hw_init(struct mtk_eth *e
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else
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mtk_hw_reset(eth);
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- if (mtk_is_netsys_v2_or_greater(eth)) {
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+ if (mtk_is_netsys_v3_or_greater(eth)) {
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/* Set FE to PDMAv2 if necessary */
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val = mtk_r32(eth, MTK_FE_GLO_MISC);
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mtk_w32(eth, val | BIT(4), MTK_FE_GLO_MISC);
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@@ -5167,11 +5167,11 @@ static const struct mtk_soc_data mt7981_
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.dma_len_offset = 8,
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},
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.rx = {
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- .desc_size = sizeof(struct mtk_rx_dma_v2),
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- .irq_done_mask = MTK_RX_DONE_INT_V2,
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+ .desc_size = sizeof(struct mtk_rx_dma),
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+ .irq_done_mask = MTK_RX_DONE_INT,
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.dma_l4_valid = RX_DMA_L4_VALID_V2,
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- .dma_max_len = MTK_TX_DMA_BUF_LEN_V2,
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- .dma_len_offset = 8,
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+ .dma_max_len = MTK_TX_DMA_BUF_LEN,
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+ .dma_len_offset = 16,
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},
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};
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@@ -5193,11 +5193,11 @@ static const struct mtk_soc_data mt7986_
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.dma_len_offset = 8,
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},
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.rx = {
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- .desc_size = sizeof(struct mtk_rx_dma_v2),
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- .irq_done_mask = MTK_RX_DONE_INT_V2,
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+ .desc_size = sizeof(struct mtk_rx_dma),
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+ .irq_done_mask = MTK_RX_DONE_INT,
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.dma_l4_valid = RX_DMA_L4_VALID_V2,
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- .dma_max_len = MTK_TX_DMA_BUF_LEN_V2,
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- .dma_len_offset = 8,
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+ .dma_max_len = MTK_TX_DMA_BUF_LEN,
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+ .dma_len_offset = 16,
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},
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};
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