mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-20 22:23:27 +00:00
039fd27173
update via update_kernel.sh -v -u 5.4 Removed upstreamed patches: 350-MIPS-Add-missing-EHB-in-mtc0-mfc0-sequence-for-DSPen.patch Script refreshed patches: 902-debloat_proc.patch 904-debloat_dma_buf.patch Attempted merge conflict in following patches: 0024-MIPS-lantiq-revert-DSA-switch-driver-PMU-clock-chang.patch Build system: x86_64 Build tested: ipq806x (Netgear R7800) Signed-off-by: John Audia <graysky@archlinux.us> [fixed sha256sum of the tarball] Signed-off-by: Petr Štetiar <ynezz@true.cz>
56 lines
2.7 KiB
Diff
56 lines
2.7 KiB
Diff
From d0ee51bbb7ce9880749a3d4794ec1fbbcda0f381 Mon Sep 17 00:00:00 2001
|
|
From: Mathias Kresin <dev@kresin.me>
|
|
Date: Sun, 7 Jul 2019 21:45:51 +0200
|
|
Subject: [PATCH] MIPS: lantiq revert DSA switch driver PMU/clock changes
|
|
|
|
Switch back to the former used names, to make the legacy switch driver
|
|
happy.
|
|
|
|
Signed-off-by: Mathias Kresin <dev@kresin.me>
|
|
---
|
|
arch/mips/lantiq/xway/sysctrl.c | 14 +++++++-------
|
|
1 file changed, 7 insertions(+), 7 deletions(-)
|
|
|
|
--- a/arch/mips/lantiq/xway/sysctrl.c
|
|
+++ b/arch/mips/lantiq/xway/sysctrl.c
|
|
@@ -503,7 +503,7 @@ void __init ltq_soc_init(void)
|
|
clkdev_add_pmu("1a800000.pcie", "msi", 1, 1, PMU1_PCIE2_MSI);
|
|
clkdev_add_pmu("1f106a00.pcie", "pdi", 1, 1, PMU1_PCIE2_PDI);
|
|
clkdev_add_pmu("1a800000.pcie", "ctl", 1, 1, PMU1_PCIE2_CTL);
|
|
- clkdev_add_pmu("1e10b308.eth", NULL, 0, 0, PMU_SWITCH | PMU_PPE_DP);
|
|
+ clkdev_add_pmu("1e108000.eth", NULL, 0, 0, PMU_SWITCH | PMU_PPE_DP);
|
|
clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
|
|
clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
|
|
} else if (of_machine_is_compatible("lantiq,ar10")) {
|
|
@@ -511,11 +511,11 @@ void __init ltq_soc_init(void)
|
|
ltq_ar10_fpi_hz(), ltq_ar10_pp32_hz());
|
|
clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0);
|
|
clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1);
|
|
- clkdev_add_pmu("1e10b308.eth", NULL, 0, 0, PMU_SWITCH |
|
|
+ clkdev_add_pmu("1e108000.eth", NULL, 0, 0, PMU_SWITCH |
|
|
PMU_PPE_DP | PMU_PPE_TC);
|
|
clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
|
|
- clkdev_add_pmu("1e108000.switch", "gphy0", 0, 0, PMU_GPHY);
|
|
- clkdev_add_pmu("1e108000.switch", "gphy1", 0, 0, PMU_GPHY);
|
|
+ clkdev_add_pmu("1f203020.gphy", NULL, 1, 0, PMU_GPHY);
|
|
+ clkdev_add_pmu("1f203068.gphy", NULL, 1, 0, PMU_GPHY);
|
|
clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
|
|
clkdev_add_pmu("1e116000.mei", "afe", 1, 2, PMU_ANALOG_DSL_AFE);
|
|
clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE);
|
|
@@ -534,12 +534,12 @@ void __init ltq_soc_init(void)
|
|
clkdev_add_pmu(NULL, "ahb", 1, 0, PMU_AHBM | PMU_AHBS);
|
|
|
|
clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
|
|
- clkdev_add_pmu("1e10b308.eth", NULL, 0, 0,
|
|
+ clkdev_add_pmu("1e108000.eth", NULL, 0, 0,
|
|
PMU_SWITCH | PMU_PPE_DPLUS | PMU_PPE_DPLUM |
|
|
PMU_PPE_EMA | PMU_PPE_TC | PMU_PPE_SLL01 |
|
|
PMU_PPE_QSB | PMU_PPE_TOP);
|
|
- clkdev_add_pmu("1e108000.switch", "gphy0", 0, 0, PMU_GPHY);
|
|
- clkdev_add_pmu("1e108000.switch", "gphy1", 0, 0, PMU_GPHY);
|
|
+ clkdev_add_pmu("1f203020.gphy", NULL, 0, 0, PMU_GPHY);
|
|
+ clkdev_add_pmu("1f203068.gphy", NULL, 0, 0, PMU_GPHY);
|
|
clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO);
|
|
clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
|
|
clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE);
|