mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-22 23:12:32 +00:00
9fe90e4e5a
Move most of the GS110TPP v1 device tree into a dtsi so that it can be shared with the GS108T v3. Additionally: * Use macros to simplify the ethernet and switch definitions * Zero-pad the offsets and sizes in the partition map to 8 digits each The spi-max-frequency value has been changed from 10MHz to 50MHz based on an analysis of the relevant datasheets. The current driver doesn't use this property, as the clock speed is fixed. However, it's required for this type of DT node, so that's why it's present here. The firmware partition has been split in half, since this is how the stock firmware uses it. This can be used to easily revert to a stock firmware if one is written to the second image area. Signed-off-by: Michael Mohr <akihana@gmail.com>
138 lines
2.2 KiB
Plaintext
138 lines
2.2 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later
|
|
|
|
#include "rtl838x.dtsi"
|
|
|
|
#include <dt-bindings/input/input.h>
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
|
|
/ {
|
|
compatible = "realtek,rtl838x-soc";
|
|
|
|
chosen {
|
|
bootargs = "console=ttyS0,115200";
|
|
};
|
|
|
|
memory@0 {
|
|
device_type = "memory";
|
|
reg = <0x0 0x8000000>;
|
|
};
|
|
|
|
keys {
|
|
compatible = "gpio-keys-polled";
|
|
poll-interval = <20>;
|
|
|
|
mode {
|
|
label = "reset";
|
|
gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_RESTART>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&gpio0 {
|
|
indirect-access-bus-id = <0>;
|
|
};
|
|
|
|
&spi0 {
|
|
status = "okay";
|
|
|
|
flash@0 {
|
|
compatible = "jedec,spi-nor";
|
|
reg = <0>;
|
|
spi-max-frequency = <50000000>;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
partition@0 {
|
|
label = "loader";
|
|
reg = <0x0000000 0x00e0000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@e0000 {
|
|
label = "bdinfo";
|
|
reg = <0x00e0000 0x0010000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@f0000 {
|
|
label = "sysinfo";
|
|
reg = <0x00f0000 0x0010000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@100000 {
|
|
label = "jffs2_cfg";
|
|
reg = <0x0100000 0x0100000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@200000 {
|
|
label = "jffs2_log";
|
|
reg = <0x0200000 0x0100000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@300000 {
|
|
label = "firmware";
|
|
compatible = "openwrt,uimage", "denx,uimage";
|
|
openwrt,ih-magic = <0x4e474520>;
|
|
reg = <0x0300000 0x0e80000>;
|
|
};
|
|
|
|
partition@1180000 {
|
|
label = "runtime2";
|
|
reg = <0x1180000 0x0e80000>;
|
|
read-only;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
ðernet0 {
|
|
mdio: mdio-bus {
|
|
compatible = "realtek,rtl838x-mdio";
|
|
regmap = <ðernet0>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
INTERNAL_PHY(8)
|
|
INTERNAL_PHY(9)
|
|
INTERNAL_PHY(10)
|
|
INTERNAL_PHY(11)
|
|
INTERNAL_PHY(12)
|
|
INTERNAL_PHY(13)
|
|
INTERNAL_PHY(14)
|
|
INTERNAL_PHY(15)
|
|
};
|
|
};
|
|
|
|
&switch0 {
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
SWITCH_PORT(8, 1, internal)
|
|
SWITCH_PORT(9, 2, internal)
|
|
SWITCH_PORT(10, 3, internal)
|
|
SWITCH_PORT(11, 4, internal)
|
|
SWITCH_PORT(12, 5, internal)
|
|
SWITCH_PORT(13, 6, internal)
|
|
SWITCH_PORT(14, 7, internal)
|
|
SWITCH_PORT(15, 8, internal)
|
|
|
|
port@28 {
|
|
ethernet = <ðernet0>;
|
|
reg = <28>;
|
|
phy-mode = "internal";
|
|
fixed-link {
|
|
speed = <1000>;
|
|
full-duplex;
|
|
};
|
|
};
|
|
};
|
|
};
|