mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-21 14:37:57 +00:00
de0a9b0eab
A GPIO assert is required to reset the system. Otherwise, the system will hang on reboot. Signed-off-by: Luiz Angelo Daros de Luca <luizluca@gmail.com> Reviewed-by: Robert Marko <robimarko@gmail.com> (cherry picked from commit a2817ce96f17db3a5af77837ae5733b47182ae0d)
123 lines
2.3 KiB
Plaintext
123 lines
2.3 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
|
|
#include "rtl8382_d-link_dgs-1210.dtsi"
|
|
|
|
/ {
|
|
compatible = "d-link,dgs-1210-28", "realtek,rtl838x-soc";
|
|
model = "D-Link DGS-1210-28";
|
|
|
|
gpio-restart {
|
|
compatible = "gpio-restart";
|
|
gpios = <&gpio1 34 GPIO_ACTIVE_LOW>;
|
|
open-source;
|
|
};
|
|
|
|
keys {
|
|
compatible = "gpio-keys-polled";
|
|
poll-interval = <20>;
|
|
|
|
reset {
|
|
label = "reset";
|
|
gpios = <&gpio1 33 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_RESTART>;
|
|
};
|
|
};
|
|
|
|
gpio1: rtl8231-gpio {
|
|
compatible = "realtek,rtl8231-gpio";
|
|
#gpio-cells = <2>;
|
|
gpio-controller;
|
|
indirect-access-bus-id = <0>;
|
|
};
|
|
};
|
|
|
|
ðernet0 {
|
|
mdio: mdio-bus {
|
|
compatible = "realtek,rtl838x-mdio";
|
|
regmap = <ðernet0>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
EXTERNAL_PHY(0)
|
|
EXTERNAL_PHY(1)
|
|
EXTERNAL_PHY(2)
|
|
EXTERNAL_PHY(3)
|
|
EXTERNAL_PHY(4)
|
|
EXTERNAL_PHY(5)
|
|
EXTERNAL_PHY(6)
|
|
EXTERNAL_PHY(7)
|
|
|
|
INTERNAL_PHY(8)
|
|
INTERNAL_PHY(9)
|
|
INTERNAL_PHY(10)
|
|
INTERNAL_PHY(11)
|
|
INTERNAL_PHY(12)
|
|
INTERNAL_PHY(13)
|
|
INTERNAL_PHY(14)
|
|
INTERNAL_PHY(15)
|
|
|
|
EXTERNAL_PHY(16)
|
|
EXTERNAL_PHY(17)
|
|
EXTERNAL_PHY(18)
|
|
EXTERNAL_PHY(19)
|
|
EXTERNAL_PHY(20)
|
|
EXTERNAL_PHY(21)
|
|
EXTERNAL_PHY(22)
|
|
EXTERNAL_PHY(23)
|
|
|
|
EXTERNAL_SFP_PHY(24)
|
|
EXTERNAL_SFP_PHY(25)
|
|
EXTERNAL_SFP_PHY(26)
|
|
EXTERNAL_SFP_PHY(27)
|
|
};
|
|
};
|
|
|
|
&switch0 {
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
SWITCH_PORT(0, 1, qsgmii)
|
|
SWITCH_PORT(1, 2, qsgmii)
|
|
SWITCH_PORT(2, 3, qsgmii)
|
|
SWITCH_PORT(3, 4, qsgmii)
|
|
SWITCH_PORT(4, 5, qsgmii)
|
|
SWITCH_PORT(5, 6, qsgmii)
|
|
SWITCH_PORT(6, 7, qsgmii)
|
|
SWITCH_PORT(7, 8, qsgmii)
|
|
|
|
SWITCH_PORT(8, 9, internal)
|
|
SWITCH_PORT(9, 10, internal)
|
|
SWITCH_PORT(10, 11, internal)
|
|
SWITCH_PORT(11, 12, internal)
|
|
SWITCH_PORT(12, 13, internal)
|
|
SWITCH_PORT(13, 14, internal)
|
|
SWITCH_PORT(14, 15, internal)
|
|
SWITCH_PORT(15, 16, internal)
|
|
|
|
SWITCH_PORT(16, 17, qsgmii)
|
|
SWITCH_PORT(17, 18, qsgmii)
|
|
SWITCH_PORT(18, 19, qsgmii)
|
|
SWITCH_PORT(19, 20, qsgmii)
|
|
SWITCH_PORT(20, 21, qsgmii)
|
|
SWITCH_PORT(21, 22, qsgmii)
|
|
SWITCH_PORT(22, 23, qsgmii)
|
|
SWITCH_PORT(23, 24, qsgmii)
|
|
|
|
SWITCH_PORT(24, 25, qsgmii)
|
|
SWITCH_PORT(25, 26, qsgmii)
|
|
SWITCH_PORT(26, 27, qsgmii)
|
|
SWITCH_PORT(27, 28, qsgmii)
|
|
|
|
port@28 {
|
|
ethernet = <ðernet0>;
|
|
reg = <28>;
|
|
phy-mode = "internal";
|
|
fixed-link {
|
|
speed = <1000>;
|
|
full-duplex;
|
|
};
|
|
};
|
|
};
|
|
};
|