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e4d840b312
b11bff90f2ad r8169: add support for RTL8125BP rev.b b3593df26ab1 r8169: add support for RTL8125D rev.b b299ea006928 r8169: adjust version numbering for RTL8126 bb18265c3aba r8169: remove support for chip version 11 2e20bf8cc057 r8169: remove unused flag RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE e340bff27e63 r8169: copy vendor driver 2.5G/5G EEE advertisement constraints The EEE advertisement patch has been reworked for linux v6.6 because phy_set_eee_broken() is only present on linux >= v6.13 and eee_broken_modes declaration has been converted to a bitmap, so linkmode_set_bit() can't be used either.e340bff27eed623fb8e3721aa69e70Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> (cherry picked from commit 084618f8db7d0e413b47bab3e0ea70804bf84ee2)
258 lines
9.6 KiB
Diff
258 lines
9.6 KiB
Diff
From b299ea0069284186b0d3d54aebe87f0d195d457a Mon Sep 17 00:00:00 2001
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From: Heiner Kallweit <hkallweit1@gmail.com>
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Date: Fri, 13 Dec 2024 20:01:41 +0100
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Subject: [PATCH] r8169: adjust version numbering for RTL8126
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Adjust version numbering for RTL8126, so that it doesn't overlap with
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new RTL8125 versions.
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Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
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Reviewed-by: Simon Horman <horms@kernel.org>
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Link: https://patch.msgid.link/6a354364-20e9-48ad-a198-468264288757@gmail.com
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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drivers/net/ethernet/realtek/r8169.h | 4 +-
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drivers/net/ethernet/realtek/r8169_main.c | 62 +++++++++----------
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.../net/ethernet/realtek/r8169_phy_config.c | 4 +-
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3 files changed, 35 insertions(+), 35 deletions(-)
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--- a/drivers/net/ethernet/realtek/r8169.h
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+++ b/drivers/net/ethernet/realtek/r8169.h
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@@ -69,8 +69,8 @@ enum mac_version {
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RTL_GIGA_MAC_VER_61,
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RTL_GIGA_MAC_VER_63,
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RTL_GIGA_MAC_VER_64,
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- RTL_GIGA_MAC_VER_65,
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- RTL_GIGA_MAC_VER_66,
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+ RTL_GIGA_MAC_VER_70,
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+ RTL_GIGA_MAC_VER_71,
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RTL_GIGA_MAC_NONE
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};
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--- a/drivers/net/ethernet/realtek/r8169_main.c
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+++ b/drivers/net/ethernet/realtek/r8169_main.c
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@@ -139,8 +139,8 @@ static const struct {
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/* reserve 62 for CFG_METHOD_4 in the vendor driver */
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[RTL_GIGA_MAC_VER_63] = {"RTL8125B", FIRMWARE_8125B_2},
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[RTL_GIGA_MAC_VER_64] = {"RTL8125D", FIRMWARE_8125D_1},
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- [RTL_GIGA_MAC_VER_65] = {"RTL8126A", FIRMWARE_8126A_2},
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- [RTL_GIGA_MAC_VER_66] = {"RTL8126A", FIRMWARE_8126A_3},
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+ [RTL_GIGA_MAC_VER_70] = {"RTL8126A", FIRMWARE_8126A_2},
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+ [RTL_GIGA_MAC_VER_71] = {"RTL8126A", FIRMWARE_8126A_3},
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};
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static const struct pci_device_id rtl8169_pci_tbl[] = {
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@@ -1228,7 +1228,7 @@ static void rtl_writephy(struct rtl8169_
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case RTL_GIGA_MAC_VER_31:
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r8168dp_2_mdio_write(tp, location, val);
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break;
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- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
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+ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
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r8168g_mdio_write(tp, location, val);
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break;
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default:
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@@ -1243,7 +1243,7 @@ static int rtl_readphy(struct rtl8169_pr
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case RTL_GIGA_MAC_VER_28:
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case RTL_GIGA_MAC_VER_31:
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return r8168dp_2_mdio_read(tp, location);
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- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
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+ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
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return r8168g_mdio_read(tp, location);
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default:
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return r8169_mdio_read(tp, location);
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@@ -1574,7 +1574,7 @@ static void __rtl8169_set_wol(struct rtl
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break;
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case RTL_GIGA_MAC_VER_34:
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case RTL_GIGA_MAC_VER_37:
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- case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_66:
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+ case RTL_GIGA_MAC_VER_39 ... RTL_GIGA_MAC_VER_71:
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r8169_mod_reg8_cond(tp, Config2, PME_SIGNAL, wolopts);
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break;
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default:
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@@ -2047,7 +2047,7 @@ static void rtl_set_eee_txidle_timer(str
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tp->tx_lpi_timer = timer_val;
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r8168_mac_ocp_write(tp, 0xe048, timer_val);
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break;
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- case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
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+ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
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tp->tx_lpi_timer = timer_val;
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RTL_W16(tp, EEE_TXIDLE_TIMER_8125, timer_val);
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break;
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@@ -2256,8 +2256,8 @@ static enum mac_version rtl8169_get_mac_
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enum mac_version ver;
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} mac_info[] = {
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/* 8126A family. */
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- { 0x7cf, 0x64a, RTL_GIGA_MAC_VER_66 },
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- { 0x7cf, 0x649, RTL_GIGA_MAC_VER_65 },
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+ { 0x7cf, 0x64a, RTL_GIGA_MAC_VER_71 },
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+ { 0x7cf, 0x649, RTL_GIGA_MAC_VER_70 },
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/* 8125D family. */
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{ 0x7cf, 0x688, RTL_GIGA_MAC_VER_64 },
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@@ -2529,7 +2529,7 @@ static void rtl_init_rxcfg(struct rtl816
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case RTL_GIGA_MAC_VER_61:
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RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST);
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break;
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- case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_66:
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+ case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_71:
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RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST |
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RX_PAUSE_SLOT_ON);
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break;
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@@ -2661,7 +2661,7 @@ static void rtl_wait_txrx_fifo_empty(str
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case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_61:
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rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42);
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break;
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- case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_66:
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+ case RTL_GIGA_MAC_VER_63 ... RTL_GIGA_MAC_VER_71:
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RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
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rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42);
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rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond_2, 100, 42);
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@@ -2904,7 +2904,7 @@ static void rtl_enable_exit_l1(struct rt
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case RTL_GIGA_MAC_VER_37 ... RTL_GIGA_MAC_VER_38:
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rtl_eri_set_bits(tp, 0xd4, 0x0c00);
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break;
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- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
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+ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
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r8168_mac_ocp_modify(tp, 0xc0ac, 0, 0x1f80);
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break;
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default:
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@@ -2918,7 +2918,7 @@ static void rtl_disable_exit_l1(struct r
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case RTL_GIGA_MAC_VER_34 ... RTL_GIGA_MAC_VER_38:
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rtl_eri_clear_bits(tp, 0xd4, 0x1f00);
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break;
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- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
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+ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
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r8168_mac_ocp_modify(tp, 0xc0ac, 0x1f80, 0);
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break;
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default:
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@@ -2944,8 +2944,8 @@ static void rtl_hw_aspm_clkreq_enable(st
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rtl_mod_config5(tp, 0, ASPM_en);
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switch (tp->mac_version) {
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- case RTL_GIGA_MAC_VER_65:
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- case RTL_GIGA_MAC_VER_66:
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+ case RTL_GIGA_MAC_VER_70:
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+ case RTL_GIGA_MAC_VER_71:
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val8 = RTL_R8(tp, INT_CFG0_8125) | INT_CFG0_CLKREQEN;
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RTL_W8(tp, INT_CFG0_8125, val8);
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break;
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@@ -2956,7 +2956,7 @@ static void rtl_hw_aspm_clkreq_enable(st
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switch (tp->mac_version) {
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case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48:
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- case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
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+ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
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/* reset ephy tx/rx disable timer */
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r8168_mac_ocp_modify(tp, 0xe094, 0xff00, 0);
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/* chip can trigger L1.2 */
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@@ -2968,7 +2968,7 @@ static void rtl_hw_aspm_clkreq_enable(st
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} else {
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switch (tp->mac_version) {
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case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48:
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- case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
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+ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
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r8168_mac_ocp_modify(tp, 0xe092, 0x00ff, 0);
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break;
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default:
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@@ -2976,8 +2976,8 @@ static void rtl_hw_aspm_clkreq_enable(st
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}
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switch (tp->mac_version) {
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- case RTL_GIGA_MAC_VER_65:
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- case RTL_GIGA_MAC_VER_66:
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+ case RTL_GIGA_MAC_VER_70:
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+ case RTL_GIGA_MAC_VER_71:
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val8 = RTL_R8(tp, INT_CFG0_8125) & ~INT_CFG0_CLKREQEN;
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RTL_W8(tp, INT_CFG0_8125, val8);
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break;
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@@ -3697,12 +3697,12 @@ static void rtl_hw_start_8125_common(str
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/* disable new tx descriptor format */
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r8168_mac_ocp_modify(tp, 0xeb58, 0x0001, 0x0000);
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- if (tp->mac_version == RTL_GIGA_MAC_VER_65 ||
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- tp->mac_version == RTL_GIGA_MAC_VER_66)
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+ if (tp->mac_version == RTL_GIGA_MAC_VER_70 ||
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+ tp->mac_version == RTL_GIGA_MAC_VER_71)
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RTL_W8(tp, 0xD8, RTL_R8(tp, 0xD8) & ~0x02);
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- if (tp->mac_version == RTL_GIGA_MAC_VER_65 ||
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- tp->mac_version == RTL_GIGA_MAC_VER_66)
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+ if (tp->mac_version == RTL_GIGA_MAC_VER_70 ||
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+ tp->mac_version == RTL_GIGA_MAC_VER_71)
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r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0400);
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else if (tp->mac_version == RTL_GIGA_MAC_VER_63)
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r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0200);
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@@ -3720,8 +3720,8 @@ static void rtl_hw_start_8125_common(str
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r8168_mac_ocp_modify(tp, 0xe056, 0x00f0, 0x0030);
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r8168_mac_ocp_modify(tp, 0xe040, 0x1000, 0x0000);
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r8168_mac_ocp_modify(tp, 0xea1c, 0x0003, 0x0001);
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- if (tp->mac_version == RTL_GIGA_MAC_VER_65 ||
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- tp->mac_version == RTL_GIGA_MAC_VER_66)
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+ if (tp->mac_version == RTL_GIGA_MAC_VER_70 ||
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+ tp->mac_version == RTL_GIGA_MAC_VER_71)
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r8168_mac_ocp_modify(tp, 0xea1c, 0x0300, 0x0000);
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else
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r8168_mac_ocp_modify(tp, 0xea1c, 0x0004, 0x0000);
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@@ -3840,8 +3840,8 @@ static void rtl_hw_config(struct rtl8169
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[RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125a_2,
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[RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
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[RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
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- [RTL_GIGA_MAC_VER_65] = rtl_hw_start_8126a,
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- [RTL_GIGA_MAC_VER_66] = rtl_hw_start_8126a,
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+ [RTL_GIGA_MAC_VER_70] = rtl_hw_start_8126a,
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+ [RTL_GIGA_MAC_VER_71] = rtl_hw_start_8126a,
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};
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if (hw_configs[tp->mac_version])
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@@ -3862,8 +3862,8 @@ static void rtl_hw_start_8125(struct rtl
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RTL_W32(tp, i, 0);
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break;
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case RTL_GIGA_MAC_VER_63:
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- case RTL_GIGA_MAC_VER_65:
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- case RTL_GIGA_MAC_VER_66:
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+ case RTL_GIGA_MAC_VER_70:
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+ case RTL_GIGA_MAC_VER_71:
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for (i = 0xa00; i < 0xa80; i += 4)
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RTL_W32(tp, i, 0);
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RTL_W16(tp, INT_CFG1_8125, 0x0000);
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@@ -4095,7 +4095,7 @@ static void rtl8169_cleanup(struct rtl81
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RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
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rtl_loop_wait_high(tp, &rtl_txcfg_empty_cond, 100, 666);
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break;
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- case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_66:
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+ case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_71:
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rtl_enable_rxdvgate(tp);
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fsleep(2000);
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break;
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@@ -4252,7 +4252,7 @@ static unsigned int rtl_quirk_packet_pad
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switch (tp->mac_version) {
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case RTL_GIGA_MAC_VER_34:
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- case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
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+ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
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padto = max_t(unsigned int, padto, ETH_ZLEN);
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break;
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default:
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@@ -5274,7 +5274,7 @@ static void rtl_hw_initialize(struct rtl
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case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_48:
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rtl_hw_init_8168g(tp);
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break;
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- case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_66:
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+ case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_71:
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rtl_hw_init_8125(tp);
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break;
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default:
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--- a/drivers/net/ethernet/realtek/r8169_phy_config.c
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+++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
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@@ -1162,8 +1162,8 @@ void r8169_hw_phy_config(struct rtl8169_
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[RTL_GIGA_MAC_VER_61] = rtl8125a_2_hw_phy_config,
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[RTL_GIGA_MAC_VER_63] = rtl8125b_hw_phy_config,
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[RTL_GIGA_MAC_VER_64] = rtl8125d_hw_phy_config,
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- [RTL_GIGA_MAC_VER_65] = rtl8126a_hw_phy_config,
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- [RTL_GIGA_MAC_VER_66] = rtl8126a_hw_phy_config,
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+ [RTL_GIGA_MAC_VER_70] = rtl8126a_hw_phy_config,
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+ [RTL_GIGA_MAC_VER_71] = rtl8126a_hw_phy_config,
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};
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if (phy_configs[ver])
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