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047695a029
This reverts commit 51397d7d95.
There are some unresolved random crashes on WRT1900AC v1 that still need
to be sorted out
Signed-off-by: Felix Fietkau <nbd@nbd.name>
180 lines
5.8 KiB
Diff
180 lines
5.8 KiB
Diff
From: Gregory CLEMENT <gregory.clement@free-electrons.com>
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Date: Thu, 4 Feb 2016 22:09:27 +0100
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Subject: [PATCH] net: mvneta: Modify the queue related fields from each cpu
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In the MVNETA_INTR_* registers, the queues related fields are per cpu,
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according to the datasheet (comment in [] are added by me):
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"In a multi-CPU system, bits of RX[or TX] queues for which the access by
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the reading[or writing] CPU is disabled are read as 0, and cannot be
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cleared[or written]."
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That means that each time we want to manipulate these bits we had to do
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it on each cpu and not only on the current cpu.
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Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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--- a/drivers/net/ethernet/marvell/mvneta.c
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+++ b/drivers/net/ethernet/marvell/mvneta.c
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@@ -1036,6 +1036,43 @@ static void mvneta_set_autoneg(struct mv
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}
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}
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+static void mvneta_percpu_unmask_interrupt(void *arg)
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+{
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+ struct mvneta_port *pp = arg;
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+
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+ /* All the queue are unmasked, but actually only the ones
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+ * mapped to this CPU will be unmasked
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+ */
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+ mvreg_write(pp, MVNETA_INTR_NEW_MASK,
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+ MVNETA_RX_INTR_MASK_ALL |
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+ MVNETA_TX_INTR_MASK_ALL |
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+ MVNETA_MISCINTR_INTR_MASK);
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+}
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+
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+static void mvneta_percpu_mask_interrupt(void *arg)
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+{
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+ struct mvneta_port *pp = arg;
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+
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+ /* All the queue are masked, but actually only the ones
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+ * mapped to this CPU will be masked
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+ */
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+ mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0);
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+ mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0);
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+ mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0);
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+}
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+
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+static void mvneta_percpu_clear_intr_cause(void *arg)
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+{
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+ struct mvneta_port *pp = arg;
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+
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+ /* All the queue are cleared, but actually only the ones
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+ * mapped to this CPU will be cleared
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+ */
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+ mvreg_write(pp, MVNETA_INTR_NEW_CAUSE, 0);
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+ mvreg_write(pp, MVNETA_INTR_MISC_CAUSE, 0);
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+ mvreg_write(pp, MVNETA_INTR_OLD_CAUSE, 0);
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+}
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+
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/* This method sets defaults to the NETA port:
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* Clears interrupt Cause and Mask registers.
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* Clears all MAC tables.
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@@ -1053,14 +1090,10 @@ static void mvneta_defaults_set(struct m
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int max_cpu = num_present_cpus();
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/* Clear all Cause registers */
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- mvreg_write(pp, MVNETA_INTR_NEW_CAUSE, 0);
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- mvreg_write(pp, MVNETA_INTR_OLD_CAUSE, 0);
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- mvreg_write(pp, MVNETA_INTR_MISC_CAUSE, 0);
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+ on_each_cpu(mvneta_percpu_clear_intr_cause, pp, true);
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/* Mask all interrupts */
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- mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0);
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- mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0);
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- mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0);
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+ on_each_cpu(mvneta_percpu_mask_interrupt, pp, true);
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mvreg_write(pp, MVNETA_INTR_ENABLE, 0);
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/* Enable MBUS Retry bit16 */
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@@ -2526,31 +2559,6 @@ static int mvneta_setup_txqs(struct mvne
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return 0;
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}
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-static void mvneta_percpu_unmask_interrupt(void *arg)
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-{
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- struct mvneta_port *pp = arg;
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-
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- /* All the queue are unmasked, but actually only the ones
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- * maped to this CPU will be unmasked
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- */
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- mvreg_write(pp, MVNETA_INTR_NEW_MASK,
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- MVNETA_RX_INTR_MASK_ALL |
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- MVNETA_TX_INTR_MASK_ALL |
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- MVNETA_MISCINTR_INTR_MASK);
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-}
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-
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-static void mvneta_percpu_mask_interrupt(void *arg)
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-{
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- struct mvneta_port *pp = arg;
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-
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- /* All the queue are masked, but actually only the ones
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- * maped to this CPU will be masked
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- */
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- mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0);
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- mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0);
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- mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0);
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-}
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-
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static void mvneta_start_dev(struct mvneta_port *pp)
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{
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int cpu;
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@@ -2601,13 +2609,10 @@ static void mvneta_stop_dev(struct mvnet
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mvneta_port_disable(pp);
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/* Clear all ethernet port interrupts */
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- mvreg_write(pp, MVNETA_INTR_MISC_CAUSE, 0);
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- mvreg_write(pp, MVNETA_INTR_OLD_CAUSE, 0);
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+ on_each_cpu(mvneta_percpu_clear_intr_cause, pp, true);
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/* Mask all ethernet port interrupts */
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- mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0);
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- mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0);
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- mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0);
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+ on_each_cpu(mvneta_percpu_mask_interrupt, pp, true);
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mvneta_tx_reset(pp);
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mvneta_rx_reset(pp);
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@@ -2919,9 +2924,7 @@ static int mvneta_percpu_notifier(struct
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}
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/* Mask all ethernet port interrupts */
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- mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0);
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- mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0);
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- mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0);
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+ on_each_cpu(mvneta_percpu_mask_interrupt, pp, true);
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napi_enable(&port->napi);
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@@ -2936,14 +2939,8 @@ static int mvneta_percpu_notifier(struct
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*/
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mvneta_percpu_elect(pp);
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- /* Unmask all ethernet port interrupts, as this
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- * notifier is called for each CPU then the CPU to
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- * Queue mapping is applied
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- */
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- mvreg_write(pp, MVNETA_INTR_NEW_MASK,
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- MVNETA_RX_INTR_MASK(rxq_number) |
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- MVNETA_TX_INTR_MASK(txq_number) |
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- MVNETA_MISCINTR_INTR_MASK);
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+ /* Unmask all ethernet port interrupts */
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+ on_each_cpu(mvneta_percpu_unmask_interrupt, pp, true);
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mvreg_write(pp, MVNETA_INTR_MISC_MASK,
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MVNETA_CAUSE_PHY_STATUS_CHANGE |
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MVNETA_CAUSE_LINK_CHANGE |
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@@ -2954,9 +2951,7 @@ static int mvneta_percpu_notifier(struct
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case CPU_DOWN_PREPARE_FROZEN:
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netif_tx_stop_all_queues(pp->dev);
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/* Mask all ethernet port interrupts */
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- mvreg_write(pp, MVNETA_INTR_NEW_MASK, 0);
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- mvreg_write(pp, MVNETA_INTR_OLD_MASK, 0);
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- mvreg_write(pp, MVNETA_INTR_MISC_MASK, 0);
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+ on_each_cpu(mvneta_percpu_mask_interrupt, pp, true);
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napi_synchronize(&port->napi);
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napi_disable(&port->napi);
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@@ -2972,10 +2967,7 @@ static int mvneta_percpu_notifier(struct
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/* Check if a new CPU must be elected now this on is down */
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mvneta_percpu_elect(pp);
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/* Unmask all ethernet port interrupts */
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- mvreg_write(pp, MVNETA_INTR_NEW_MASK,
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- MVNETA_RX_INTR_MASK(rxq_number) |
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- MVNETA_TX_INTR_MASK(txq_number) |
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- MVNETA_MISCINTR_INTR_MASK);
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+ on_each_cpu(mvneta_percpu_unmask_interrupt, pp, true);
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mvreg_write(pp, MVNETA_INTR_MISC_MASK,
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MVNETA_CAUSE_PHY_STATUS_CHANGE |
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MVNETA_CAUSE_LINK_CHANGE |
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