openwrt/target/linux/mediatek/patches-5.15/920-v5.16-watchdog-mtk-add-disable_wdt_extrst-support.patch
Nick Hainke 29d987fc89 mediatek: replace mt7986 watchdog assert patch with upstream
Replace "920-watchdog-add-mt7986-assert.patch" with upstreamed
- 920-v5.16-watchdog-mtk-add-disable_wdt_extrst-support.patch
- 921-v5.19-watchdog-mtk_wdt-mt7986-Add-toprgu-reset-controller.patch

Signed-off-by: Nick Hainke <vincent@systemli.org>
2022-11-05 14:07:46 +00:00

51 lines
1.6 KiB
Diff

From 59b0f51335644ee603260faaa4298c0115fb7187 Mon Sep 17 00:00:00 2001
From: Fengquan Chen <Fengquan.Chen@mediatek.com>
Date: Tue, 14 Sep 2021 20:34:54 +0800
Subject: [PATCH] watchdog: mtk: add disable_wdt_extrst support
In some cases, we may need watchdog just to trigger an
internal soc reset without sending any output signal.
Provide a disable_wdt_extrst parameter for configuration.
We can disable or enable it just by configuring dts.
Signed-off-by: Fengquan Chen <fengquan.chen@mediatek.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20210914123454.32603-3-Fengquan.Chen@mediatek.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
---
drivers/watchdog/mtk_wdt.c | 7 +++++++
1 file changed, 7 insertions(+)
--- a/drivers/watchdog/mtk_wdt.c
+++ b/drivers/watchdog/mtk_wdt.c
@@ -65,6 +65,7 @@ struct mtk_wdt_dev {
void __iomem *wdt_base;
spinlock_t lock; /* protects WDT_SWSYSRST reg */
struct reset_controller_dev rcdev;
+ bool disable_wdt_extrst;
};
struct mtk_wdt_data {
@@ -256,6 +257,8 @@ static int mtk_wdt_start(struct watchdog
reg |= (WDT_MODE_IRQ_EN | WDT_MODE_DUAL_EN);
else
reg &= ~(WDT_MODE_IRQ_EN | WDT_MODE_DUAL_EN);
+ if (mtk_wdt->disable_wdt_extrst)
+ reg &= ~WDT_MODE_EXRST_EN;
reg |= (WDT_MODE_EN | WDT_MODE_KEY);
iowrite32(reg, wdt_base + WDT_MODE);
@@ -381,6 +384,10 @@ static int mtk_wdt_probe(struct platform
if (err)
return err;
}
+
+ mtk_wdt->disable_wdt_extrst =
+ of_property_read_bool(dev->of_node, "mediatek,disable-extrst");
+
return 0;
}