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net: dsa: mt7530: explain exposing MDIO bus of MT7531AE better net: dsa: mt7530: do not pass port variable to mt7531_rgmii_setup() net: dsa: mt7530: use priv->ds->num_ports instead of MT7530_NUM_PORTS net: dsa: mt7530: get rid of mac_port_validate member of mt753x_info net: dsa: mt7530: refactor MT7530_PMEEECR_P() net: dsa: mt7530: get rid of function sanity check net: dsa: mt7530: define MAC speed capabilities per switch model net: dsa: mt7530: return mt7530_setup_mdio & mt7531_setup_common on error net: dsa: mt7530: move MT753X_MTRAP operations for MT7530 net: dsa: mt7530: refactor MT7530_HWTRAP and MT7530_MHWTRAP net: dsa: mt7530: refactor MT7530_MFC and MT7531_CFC, add MT7531_QRY_FFP net: dsa: mt7530: rename mt753x_bpdu_port_fw enum to mt753x_to_cpu_fw net: dsa: mt7530: rename p5_intf_sel and use only for MT7530 switch net: dsa: mt7530: refactor MT7530_PMCR_P() net: dsa: mt7530: disable EEE abilities on failure on MT7531 and MT7988 Signed-off-by: Daniel Golle <daniel@makrotopia.org>
89 lines
3.5 KiB
Diff
89 lines
3.5 KiB
Diff
From 856e8954a0a88d1a4d2b43e9002b9249131a156f Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <arinc.unal@arinc9.com>
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Date: Mon, 22 Apr 2024 10:15:08 +0300
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Subject: [PATCH 01/15] net: dsa: mt7530: disable EEE abilities on failure on
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MT7531 and MT7988
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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The MT7531_FORCE_EEE1G and MT7531_FORCE_EEE100 bits let the
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PMCR_FORCE_EEE1G and PMCR_FORCE_EEE100 bits determine the 1G/100 EEE
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abilities of the MAC. If MT7531_FORCE_EEE1G and MT7531_FORCE_EEE100 are
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unset, the abilities are left to be determined by PHY auto polling.
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The commit 40b5d2f15c09 ("net: dsa: mt7530: Add support for EEE features")
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made it so that the PMCR_FORCE_EEE1G and PMCR_FORCE_EEE100 bits are set on
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mt753x_phylink_mac_link_up(). But it did not set the MT7531_FORCE_EEE1G and
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MT7531_FORCE_EEE100 bits. Because of this, the EEE abilities will be
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determined by PHY auto polling, regardless of the result of phy_init_eee().
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Define these bits and add them to the MT7531_FORCE_MODE mask which is set
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in mt7531_setup_common(). With this, there won't be any EEE abilities set
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when phy_init_eee() returns a negative value.
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Thanks to Russell for explaining when phy_init_eee() could return a
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negative value below.
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Looking at phy_init_eee(), it could return a negative value when:
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1. phydev->drv is NULL
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2. if genphy_c45_eee_is_active() returns negative
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3. if genphy_c45_eee_is_active() returns zero, it returns -EPROTONOSUPPORT
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4. if phy_set_bits_mmd() fails (e.g. communication error with the PHY)
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If we then look at genphy_c45_eee_is_active(), then:
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genphy_c45_read_eee_adv() and genphy_c45_read_eee_lpa() propagate their
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non-zero return values, otherwise this function returns zero or positive
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integer.
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If we then look at genphy_c45_read_eee_adv(), then a failure of
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phy_read_mmd() would cause a negative value to be returned.
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Looking at genphy_c45_read_eee_lpa(), the same is true.
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So, it can be summarised as:
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- phydev->drv is NULL
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- there is a communication error accessing the PHY
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- EEE is not active
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otherwise, it returns zero on success.
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If one wishes to determine whether an error occurred vs EEE not being
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supported through negotiation for the negotiated speed, if it returns
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-EPROTONOSUPPORT in the latter case. Other error codes mean either the
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driver has been unloaded or communication error.
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In conclusion, determining the EEE abilities by PHY auto polling shouldn't
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result in having any EEE abilities enabled, when one of the last two
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situations in the summary happens. And it seems that if phydev->drv is
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NULL, there would be bigger problems with the device than a broken link. So
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this is not a bugfix.
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Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
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---
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drivers/net/dsa/mt7530.h | 6 +++++-
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1 file changed, 5 insertions(+), 1 deletion(-)
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--- a/drivers/net/dsa/mt7530.h
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+++ b/drivers/net/dsa/mt7530.h
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@@ -328,11 +328,15 @@ enum mt7530_vlan_port_acc_frm {
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#define MT7531_FORCE_DPX BIT(29)
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#define MT7531_FORCE_RX_FC BIT(28)
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#define MT7531_FORCE_TX_FC BIT(27)
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+#define MT7531_FORCE_EEE100 BIT(26)
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+#define MT7531_FORCE_EEE1G BIT(25)
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#define MT7531_FORCE_MODE (MT7531_FORCE_LNK | \
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MT7531_FORCE_SPD | \
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MT7531_FORCE_DPX | \
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MT7531_FORCE_RX_FC | \
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- MT7531_FORCE_TX_FC)
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+ MT7531_FORCE_TX_FC | \
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+ MT7531_FORCE_EEE100 | \
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+ MT7531_FORCE_EEE1G)
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#define PMCR_LINK_SETTINGS_MASK (PMCR_TX_EN | PMCR_FORCE_SPEED_1000 | \
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PMCR_RX_EN | PMCR_FORCE_SPEED_100 | \
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PMCR_TX_FC_EN | PMCR_RX_FC_EN | \
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