mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-22 06:57:57 +00:00
ee035de0fd
Import patches from Linux v5.16 and v5.17 to get 2500Base-X SFP working
again with mvneta driver after the generic phylink validate backport.
Fixes: aab466f422 ("kernel: backport generic phylink validate")
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
49 lines
1.9 KiB
Diff
49 lines
1.9 KiB
Diff
From fdedb695e6a8657302341cda81d519ef04f9acaa Mon Sep 17 00:00:00 2001
|
|
From: Russell King <rmk+kernel@armlinux.org.uk>
|
|
Date: Wed, 27 Oct 2021 10:03:43 +0100
|
|
Subject: [PATCH] net: mvneta: populate supported_interfaces member
|
|
|
|
Populate the phy_interface_t bitmap for the Marvell mvneta driver with
|
|
interfaces modes supported by the MAC.
|
|
|
|
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
|
|
Signed-off-by: David S. Miller <davem@davemloft.net>
|
|
---
|
|
drivers/net/ethernet/marvell/mvneta.c | 25 +++++++++++++++++++++++++
|
|
1 file changed, 25 insertions(+)
|
|
|
|
--- a/drivers/net/ethernet/marvell/mvneta.c
|
|
+++ b/drivers/net/ethernet/marvell/mvneta.c
|
|
@@ -5180,6 +5180,31 @@ static int mvneta_probe(struct platform_
|
|
|
|
pp->phylink_config.dev = &dev->dev;
|
|
pp->phylink_config.type = PHYLINK_NETDEV;
|
|
+ phy_interface_set_rgmii(pp->phylink_config.supported_interfaces);
|
|
+ __set_bit(PHY_INTERFACE_MODE_QSGMII,
|
|
+ pp->phylink_config.supported_interfaces);
|
|
+ if (comphy) {
|
|
+ /* If a COMPHY is present, we can support any of the serdes
|
|
+ * modes and switch between them.
|
|
+ */
|
|
+ __set_bit(PHY_INTERFACE_MODE_SGMII,
|
|
+ pp->phylink_config.supported_interfaces);
|
|
+ __set_bit(PHY_INTERFACE_MODE_1000BASEX,
|
|
+ pp->phylink_config.supported_interfaces);
|
|
+ __set_bit(PHY_INTERFACE_MODE_2500BASEX,
|
|
+ pp->phylink_config.supported_interfaces);
|
|
+ } else if (phy_mode == PHY_INTERFACE_MODE_2500BASEX) {
|
|
+ /* No COMPHY, with only 2500BASE-X mode supported */
|
|
+ __set_bit(PHY_INTERFACE_MODE_2500BASEX,
|
|
+ pp->phylink_config.supported_interfaces);
|
|
+ } else if (phy_mode == PHY_INTERFACE_MODE_1000BASEX ||
|
|
+ phy_mode == PHY_INTERFACE_MODE_SGMII) {
|
|
+ /* No COMPHY, we can switch between 1000BASE-X and SGMII */
|
|
+ __set_bit(PHY_INTERFACE_MODE_1000BASEX,
|
|
+ pp->phylink_config.supported_interfaces);
|
|
+ __set_bit(PHY_INTERFACE_MODE_SGMII,
|
|
+ pp->phylink_config.supported_interfaces);
|
|
+ }
|
|
|
|
phylink = phylink_create(&pp->phylink_config, pdev->dev.fwnode,
|
|
phy_mode, &mvneta_phylink_ops);
|