openwrt/target/linux/ath79/dts/ar9344_enterasys_ws-ap3705i.dts
Adrian Schmutzler 7054721cf9 ath79: enable UART in SoC DTSI files
The uart node is enabled on all devices except one (GL-USB150 *).
Thus, let's not have a few hundred nodes to enable it, but do not
disable it in the first place.

Where the majority of devices is using it, also move the serial0
alias to the DTSI.

*) Since GL-USB150 even defines serial0 alias, the missing uart
   is probably just a mistake. Anyway, disable it for now so this
   patch stays cosmetic.

Apply this to 21.02 as well to remove an unnecessary backporting
pitfall.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
(cherry picked from commit 3a4b751110)
2021-02-25 14:42:11 +01:00

227 lines
3.6 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "ar9344.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "enterasys,ws-ap3705i", "qca,ar9344";
model = "Enterasys WS-AP3705i";
chosen {
bootargs = "console=ttyS0,115200n8";
};
aliases {
led-boot = &led_power_green;
led-failsafe = &led_power_red;
led-running = &led_power_green;
led-upgrade = &led_power_red;
label-mac-device = &eth0;
};
mtd-concat {
compatible = "mtd-concat";
devices = <&fwconcat0 &fwconcat1>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x0 0x1dd0000>;
};
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&enable_gpio_11 &enable_gpio_16>;
led_power_green: power_green {
label = "green:power";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
};
led_power_red: power_red {
label = "red:power";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
};
lan_blue {
label = "blue:lan";
gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
};
lan_green {
label = "green:lan";
gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
};
radio2 {
label = "green:radio2";
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
};
ath9k-leds {
compatible = "gpio-leds";
radio1 {
label = "green:radio1";
gpios = <&ath9k 0 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
};
keys {
compatible = "gpio-keys";
reset {
label = "Reset button";
linux,code = <KEY_RESTART>;
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
};
};
};
&ref {
clock-frequency = <40000000>;
};
&pinmux {
enable_gpio_16: pinmux_enable_gpio_16 {
pinctrl-single,bits = <0x10 0x0 0x000000ff>;
};
enable_gpio_11: pinmux_enable_gpio_11 {
pinctrl-single,bits = <0x8 0x0 0xff000000>;
};
};
&wmac {
status = "okay";
qca,no-eeprom;
};
&spi {
status = "okay";
cs-gpios = <0>, <0>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot-bak";
reg = <0x0 0x80000>;
read-only;
};
partition@80000 {
label = "u-boot-env0";
reg = <0x80000 0x10000>;
read-only;
};
partition@90000 {
label = "u-boot-env1";
reg = <0x90000 0x10000>;
read-only;
};
partition@a0000 {
label = "u-boot";
reg = <0xa0000 0x80000>;
read-only;
};
partition@120000 {
label = "calibrate";
reg = <0x120000 0x10000>;
read-only;
};
partition@130000 {
label = "nvram";
reg = <0x130000 0x100000>;
read-only;
};
fwconcat0: partition@230000 {
label = "fwconcat0";
reg = <0x230000 0xdd0000>;
};
};
};
flash@1 {
compatible = "jedec,spi-nor";
reg = <1>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
fwconcat1: partition@0 {
label = "fwconcat1";
reg = <0x0 0x1000000>;
};
};
};
};
&pcie {
status = "okay";
ath9k: wifi@0,0 {
compatible = "pci168c,0033";
reg = <0x0000 0 0 0 0>;
qca,no-eeprom;
#gpio-cells = <2>;
gpio-controller;
};
};
&mdio0 {
status = "okay";
phy0: ethernet-phy@0 {
reg = <0>;
};
};
&eth0 {
status = "okay";
pll-data = <0x1e000000 0x08000101 0x08001313>;
phy-mode = "rgmii";
phy-handle = <&phy0>;
gmac-config {
device = <&gmac>;
rgmii-gmac0 = <1>;
rxd-delay = <0>;
rxdv-delay = <0>;
txen-delay = <0>;
txd-delay = <0>;
};
};