openwrt/target/linux/ath79/dts/ar7242_avm_fritz300e.dts
Adrian Schmutzler 7054721cf9 ath79: enable UART in SoC DTSI files
The uart node is enabled on all devices except one (GL-USB150 *).
Thus, let's not have a few hundred nodes to enable it, but do not
disable it in the first place.

Where the majority of devices is using it, also move the serial0
alias to the DTSI.

*) Since GL-USB150 even defines serial0 alias, the missing uart
   is probably just a mistake. Anyway, disable it for now so this
   patch stays cosmetic.

Apply this to 21.02 as well to remove an unnecessary backporting
pitfall.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
(cherry picked from commit 3a4b751110)
2021-02-25 14:42:11 +01:00

164 lines
2.6 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "ar7242.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "avm,fritz300e", "qca,ar7242";
model = "AVM FRITZ!WLAN Repeater 300E";
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
label-mac-device = &ath9k;
};
keys {
compatible = "gpio-keys";
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
led_power: power {
label = "green:power";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
default-state = "on";
};
lan {
label = "green:lan";
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
};
wlan {
label = "green:wlan";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
};
ath9k-leds {
compatible = "gpio-leds";
rssi0 {
label = "green:rssi0";
gpios = <&ath9k 10 GPIO_ACTIVE_LOW>;
};
rssi1 {
label = "green:rssi1";
gpios = <&ath9k 4 GPIO_ACTIVE_LOW>;
};
rssi2 {
label = "green:rssi2";
gpios = <&ath9k 6 GPIO_ACTIVE_LOW>;
};
rssi3 {
label = "green:rssi3";
gpios = <&ath9k 7 GPIO_ACTIVE_LOW>;
};
rssi4 {
label = "green:rssi4";
gpios = <&ath9k 5 GPIO_ACTIVE_LOW>;
};
};
eth-phy-reset {
compatible = "regulator-fixed";
regulator-name = "eth-phy-reset";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio 11 GPIO_ACTIVE_LOW>;
startup-delay-us = <300000>;
enable-active-high;
regulator-always-on;
};
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
reg = <0x0 0x20000>;
label = "urloader";
read-only;
};
partition@20000 {
compatible = "avm,eva-firmware";
reg = <0x20000 0xee0000>;
label = "firmware";
};
partition@f00000 {
reg = <0xf00000 0x80000>;
label = "tffs (1)";
read-only;
};
partition@f80000 {
reg = <0xf80000 0x80000>;
label = "tffs (2)";
read-only;
};
};
};
};
&pcie {
status = "okay";
ath9k: wifi@0,0 {
reg = <0x0000 0 0 0 0>;
#gpio-cells = <2>;
gpio-controller;
qca,no-eeprom;
};
};
&mdio0 {
status = "okay";
phy0: ethernet-phy@0 {
reg = <0>;
phy-mode = "rgmii";
};
};
&eth0 {
status = "okay";
phy-mode = "rgmii";
phy-handle = <&phy0>;
pll-data = <0x16000000 0x00000101 0x00001313>;
};