openwrt/target/linux/ath79/dts/ar7240_engenius_enh202-v1.dts
Michael Pratt 642c88714c ath79: adjust ath79/tiny Senao APs to 4k blocksize
ath79/tiny kernel config has
CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
from commit
05d35403b2

Because of this, these changes are required for 2 reasons:

1.

Senao devices in ath79/tiny
with a 'failsafe' partition and the tar.gz sysupgrade platform
and a flash chip that supports 4k sectors
will fail to reboot to openwrt after a sysupgrade.

the stored checksum is made with the 64k blocksize length
of the image to be flashed,
and the actual checksum changes after flashing due to JFFS2 space
being formatted within the length of the rootfs from the image

example:
0x440000 length of kernel + rootfs (from sysupgrade.bin)
0x439000 offset of rootfs_data (from kernel log)

2.

for boards with flash chips that support 4k sectors:
saving configuration over sysupgrade is not possible
because sysupgrade.tgz is appended at a 64k boundary
and the mtd parser starts JFFS2 at a 4k boundary.

for boards with flash chips that do not support 4k sectors:
partitioning with 4k boundaries causes a boot loop
from the mtd parser not finding kernel and rootfs.

Also:

Some of the Senao boards that belong in ath79/tiny,
for example ENH202,
have a flash chip that does not support 4k sectors
(no SECT_4K symbol in upstream source).

Because of this, partitioning must be different for these devices
depending on the flash chip model detected by the kernel.

Therefore:

this creates 2 DTSI files
to replace the single one with 64k partitioning
for 4k and 64k partitioning respectively.

Signed-off-by: Michael Pratt <mcpratt@pm.me>
(cherry picked from commit a58cb22bbe)
2021-06-11 07:20:31 +02:00

95 lines
1.6 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "ar7240.dtsi"
#include "ar724x_senao_loader-64k.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "engenius,enh202-v1", "qca,ar7240";
model = "EnGenius ENH202 v1";
aliases {
led-boot = &led_rssihigh;
led-failsafe = &led_rssihigh;
led-running = &led_rssihigh;
led-upgrade = &led_rssihigh;
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&jtag_disable_pins &switch_led_disable_pins &clks_disable_pins>;
rssilow {
label = "red:rssilow";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
};
rssimedium {
label = "amber:rssimedium";
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
};
led_rssihigh: rssihigh {
label = "green:rssihigh";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
};
lan {
label = "amber:lan";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
};
wan {
label = "green:wan";
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
};
};
ath9k-leds {
compatible = "gpio-leds";
wlan {
label = "green:wlan";
gpios = <&ath9k 1 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
};
};
&eth0 {
mtd-mac-address = <&art 0x0>;
};
&eth1 {
status = "okay";
mtd-mac-address = <&art 0x0>;
};
&pcie {
status = "okay";
ath9k: wifi@0,0 {
compatible = "pci168c,002a";
reg = <0x0000 0 0 0 0>;
qca,no-eeprom;
#gpio-cells = <2>;
gpio-controller;
};
};