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https://github.com/openwrt/openwrt.git
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b4c02c9998
Removed upstreamed patches:
generic/pending-5.4
445-mtd-spinand-gigadevice-Only-one-dummy-byte-in-QUA.patch
446-mtd-spinand-gigadevice-Add-QE-Bit.patch
pistachio/patches-5.4
150-pwm-img-Fix-null-pointer-access-in-probe.patch
Manually rebased:
layerscape/patches-5.4
801-audio-0011-Revert-ASoC-fsl_sai-add-of_match-data.patch
801-audio-0039-MLK-16224-6-ASoC-fsl_sai-fix-DSD-suspend-resume.patch
801-audio-0073-MLK-21957-3-ASoC-fsl_sai-add-bitcount-and-timestamp-.patch
820-usb-0009-usb-dwc3-Add-workaround-for-host-mode-VBUS-glitch-wh.patch
All modifications made by update_kernel.sh
Build system: x86_64
Build-tested: ipq806x/R7800, ath79/generic, bcm27xx/bcm2711,
mvebu (mamba, rango), x86_64, ramips/mt7621
Run-tested: ipq806x/R7800, mvebu (mamba, rango), x86_64, ramips (RT-AC57U)
No dmesg regressions, everything functional
Signed-off-by: John Audia <graysky@archlinux.us>
[alter 820-usb-0009-usb-dwc3-Add-workaround-for-host-mode-VBUS-glitch-wh]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
66 lines
2.7 KiB
Diff
66 lines
2.7 KiB
Diff
From 094a648bc2217a9624f35224059c3eac86196143 Mon Sep 17 00:00:00 2001
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From: Joakim Zhang <qiangqing.zhang@nxp.com>
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Date: Fri, 12 Jul 2019 08:02:51 +0000
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Subject: [PATCH] can: flexcan: add ISO CAN FD feature support
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ISO CAN FD is introduced to increase the failture detection capability
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than non-ISO CAN FD. The non-ISO CAN FD is still supported by FlexCAN so
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that it can be used mainly during an intermediate phase, for evaluation
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and development purposes.
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Therefore, it is strongly recommended to configure FlexCAN to the ISO
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CAN FD protocol by setting the ISOCANFDEN field in the CTRL2 register.
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NOTE: If you only set "fd on", driver will use ISO FD mode by default.
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You should set "fd-non-iso on" after setting "fd on" if you want to use
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NON ISO FD mode.
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Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
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Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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---
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drivers/net/can/flexcan.c | 8 +++++++-
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1 file changed, 7 insertions(+), 1 deletion(-)
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--- a/drivers/net/can/flexcan.c
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+++ b/drivers/net/can/flexcan.c
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@@ -92,6 +92,7 @@
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#define FLEXCAN_CTRL2_MRP BIT(18)
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#define FLEXCAN_CTRL2_RRS BIT(17)
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#define FLEXCAN_CTRL2_EACEN BIT(16)
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+#define FLEXCAN_CTRL2_ISOCANFDEN BIT(12)
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/* FLEXCAN memory error control register (MECR) bits */
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#define FLEXCAN_MECR_ECRWRDIS BIT(31)
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@@ -1323,6 +1324,7 @@ static int flexcan_chip_start(struct net
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reg_fdctrl = priv->read(®s->fdctrl) & ~FLEXCAN_FDCTRL_FDRATE;
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reg_fdctrl &= ~(FLEXCAN_FDCTRL_MBDSR1(0x3) | FLEXCAN_FDCTRL_MBDSR0(0x3));
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reg_mcr = priv->read(®s->mcr) & ~FLEXCAN_MCR_FDEN;
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+ reg_ctrl2 = priv->read(®s->ctrl2) & ~FLEXCAN_CTRL2_ISOCANFDEN;
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/* support BRS when set CAN FD mode
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* 64 bytes payload per MB and 7 MBs per RAM block by default
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@@ -1332,10 +1334,14 @@ static int flexcan_chip_start(struct net
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reg_fdctrl |= FLEXCAN_FDCTRL_FDRATE;
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reg_fdctrl |= FLEXCAN_FDCTRL_MBDSR1(0x3) | FLEXCAN_FDCTRL_MBDSR0(0x3);
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reg_mcr |= FLEXCAN_MCR_FDEN;
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+
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+ if (!(priv->can.ctrlmode & CAN_CTRLMODE_FD_NON_ISO))
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+ reg_ctrl2 |= FLEXCAN_CTRL2_ISOCANFDEN;
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}
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priv->write(reg_fdctrl, ®s->fdctrl);
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priv->write(reg_mcr, ®s->mcr);
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+ priv->write(reg_ctrl2, ®s->ctrl2);
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}
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if ((priv->devtype_data->quirks & FLEXCAN_QUIRK_ENABLE_EACEN_RRS)) {
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@@ -1853,7 +1859,7 @@ static int flexcan_probe(struct platform
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if (priv->devtype_data->quirks & FLEXCAN_QUIRK_TIMESTAMP_SUPPORT_FD) {
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if (priv->devtype_data->quirks & FLEXCAN_QUIRK_USE_OFF_TIMESTAMP) {
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- priv->can.ctrlmode_supported |= CAN_CTRLMODE_FD;
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+ priv->can.ctrlmode_supported |= CAN_CTRLMODE_FD | CAN_CTRLMODE_FD_NON_ISO;
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priv->can.bittiming_const = &flexcan_fd_bittiming_const;
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priv->can.data_bittiming_const = &flexcan_fd_data_bittiming_const;
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} else {
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