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f7d0a4797f
Backport commits adding support for the MT7988 built-in switch to the
mt7530 driver.
This change results in the Kconfig symbol NET_DSA_MT7530 to be extended
by NET_DSA_MT7530_MDIO (everything formally covered by NET_DSA_MT7530)
and NET_DSA_MT7530_MMIO (a new driver for the MMIO-connected built-in
switch of the MT7988 SoC).
Select NET_DSA_MT7530_MDIO for all targets previously selecting
NET_DSA_MT7530, with the exception of mediatek/filogic which also
selects NET_DSA_MT7530_MMIO.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 958fdf36e3)
144 lines
3.9 KiB
Diff
144 lines
3.9 KiB
Diff
From 7f54cc9772ced2d76ac11832f0ada43798443ac9 Mon Sep 17 00:00:00 2001
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From: Daniel Golle <daniel@makrotopia.org>
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Date: Mon, 3 Apr 2023 02:19:02 +0100
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Subject: [PATCH 13/16] net: dsa: mt7530: split-off common parts from
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mt7531_setup
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MT7988 shares a significant part of the setup function with MT7531.
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Split-off those parts into a shared function which is going to be used
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also by mt7988_setup.
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Signed-off-by: Daniel Golle <daniel@makrotopia.org>
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Reviewed-by: Andrew Lunn <andrew@lunn.ch>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/dsa/mt7530.c | 99 ++++++++++++++++++++++------------------
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1 file changed, 55 insertions(+), 44 deletions(-)
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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@@ -2348,11 +2348,64 @@ mt7530_setup(struct dsa_switch *ds)
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}
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static int
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+mt7531_setup_common(struct dsa_switch *ds)
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+{
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+ struct mt7530_priv *priv = ds->priv;
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+ struct dsa_port *cpu_dp;
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+ int ret, i;
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+
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+ /* BPDU to CPU port */
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+ dsa_switch_for_each_cpu_port(cpu_dp, ds) {
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+ mt7530_rmw(priv, MT7531_CFC, MT7531_CPU_PMAP_MASK,
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+ BIT(cpu_dp->index));
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+ break;
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+ }
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+ mt7530_rmw(priv, MT753X_BPC, MT753X_BPDU_PORT_FW_MASK,
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+ MT753X_BPDU_CPU_ONLY);
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+
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+ /* Enable and reset MIB counters */
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+ mt7530_mib_reset(ds);
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+
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+ for (i = 0; i < MT7530_NUM_PORTS; i++) {
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+ /* Disable forwarding by default on all ports */
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+ mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK,
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+ PCR_MATRIX_CLR);
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+
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+ /* Disable learning by default on all ports */
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+ mt7530_set(priv, MT7530_PSC_P(i), SA_DIS);
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+
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+ mt7530_set(priv, MT7531_DBG_CNT(i), MT7531_DIS_CLR);
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+
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+ if (dsa_is_cpu_port(ds, i)) {
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+ ret = mt753x_cpu_port_enable(ds, i);
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+ if (ret)
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+ return ret;
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+ } else {
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+ mt7530_port_disable(ds, i);
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+
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+ /* Set default PVID to 0 on all user ports */
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+ mt7530_rmw(priv, MT7530_PPBV1_P(i), G0_PORT_VID_MASK,
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+ G0_PORT_VID_DEF);
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+ }
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+
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+ /* Enable consistent egress tag */
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+ mt7530_rmw(priv, MT7530_PVC_P(i), PVC_EG_TAG_MASK,
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+ PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT));
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+ }
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+
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+ /* Flush the FDB table */
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+ ret = mt7530_fdb_cmd(priv, MT7530_FDB_FLUSH, NULL);
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+ if (ret < 0)
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+ return ret;
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+
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+ return 0;
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+}
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+
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+static int
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mt7531_setup(struct dsa_switch *ds)
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{
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struct mt7530_priv *priv = ds->priv;
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struct mt7530_dummy_poll p;
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- struct dsa_port *cpu_dp;
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u32 val, id;
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int ret, i;
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@@ -2426,44 +2479,7 @@ mt7531_setup(struct dsa_switch *ds)
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mt7531_ind_c45_phy_write(priv, MT753X_CTRL_PHY_ADDR, MDIO_MMD_VEND2,
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CORE_PLL_GROUP4, val);
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- /* BPDU to CPU port */
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- dsa_switch_for_each_cpu_port(cpu_dp, ds) {
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- mt7530_rmw(priv, MT7531_CFC, MT7531_CPU_PMAP_MASK,
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- BIT(cpu_dp->index));
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- break;
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- }
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- mt7530_rmw(priv, MT753X_BPC, MT753X_BPDU_PORT_FW_MASK,
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- MT753X_BPDU_CPU_ONLY);
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-
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- /* Enable and reset MIB counters */
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- mt7530_mib_reset(ds);
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-
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- for (i = 0; i < MT7530_NUM_PORTS; i++) {
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- /* Disable forwarding by default on all ports */
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- mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK,
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- PCR_MATRIX_CLR);
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-
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- /* Disable learning by default on all ports */
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- mt7530_set(priv, MT7530_PSC_P(i), SA_DIS);
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-
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- mt7530_set(priv, MT7531_DBG_CNT(i), MT7531_DIS_CLR);
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-
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- if (dsa_is_cpu_port(ds, i)) {
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- ret = mt753x_cpu_port_enable(ds, i);
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- if (ret)
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- return ret;
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- } else {
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- mt7530_port_disable(ds, i);
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-
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- /* Set default PVID to 0 on all user ports */
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- mt7530_rmw(priv, MT7530_PPBV1_P(i), G0_PORT_VID_MASK,
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- G0_PORT_VID_DEF);
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- }
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-
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- /* Enable consistent egress tag */
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- mt7530_rmw(priv, MT7530_PVC_P(i), PVC_EG_TAG_MASK,
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- PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT));
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- }
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+ mt7531_setup_common(ds);
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/* Setup VLAN ID 0 for VLAN-unaware bridges */
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ret = mt7530_setup_vlan0(priv);
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@@ -2473,11 +2489,6 @@ mt7531_setup(struct dsa_switch *ds)
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ds->assisted_learning_on_cpu_port = true;
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ds->mtu_enforcement_ingress = true;
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- /* Flush the FDB table */
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- ret = mt7530_fdb_cmd(priv, MT7530_FDB_FLUSH, NULL);
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- if (ret < 0)
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- return ret;
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-
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return 0;
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}
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