mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-19 05:38:00 +00:00
6bbb75dfdc
bmips has all the dt-bindings includes inside each SoC .dtsi files, so let's move the new includes there instead of adding them to each board .dts files. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
189 lines
2.8 KiB
Plaintext
189 lines
2.8 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later
|
|
|
|
#include "bcm6328.dtsi"
|
|
|
|
/ {
|
|
model = "Arcadyan AR7516";
|
|
compatible = "arcadyan,ar7516", "brcm,bcm6328";
|
|
|
|
aliases {
|
|
led-failsafe = &led_upgrade_green;
|
|
led-upgrade = &led_upgrade_green;
|
|
};
|
|
|
|
keys {
|
|
compatible = "gpio-keys-polled";
|
|
poll-interval = <100>;
|
|
|
|
reset {
|
|
label = "reset";
|
|
gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_RESTART>;
|
|
debounce-interval = <60>;
|
|
};
|
|
|
|
wps {
|
|
label = "wps";
|
|
gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_WPS_BUTTON>;
|
|
debounce-interval = <60>;
|
|
};
|
|
};
|
|
|
|
bcm43227-sprom {
|
|
compatible = "brcm,bcma-sprom";
|
|
|
|
pci-bus = <1>;
|
|
pci-dev = <0>;
|
|
|
|
nvmem-cells = <&macaddr_cfe_6a0 1>;
|
|
nvmem-cell-names = "mac-address";
|
|
|
|
brcm,sprom = "brcm/bcm43227-sprom.bin";
|
|
};
|
|
};
|
|
|
|
&ehci {
|
|
status = "okay";
|
|
};
|
|
|
|
ðernet {
|
|
status = "okay";
|
|
|
|
nvmem-cells = <&macaddr_cfe_6a0 0>;
|
|
nvmem-cell-names = "mac-address";
|
|
};
|
|
|
|
&hsspi {
|
|
status = "okay";
|
|
|
|
flash@0 {
|
|
compatible = "jedec,spi-nor";
|
|
spi-max-frequency = <16666667>;
|
|
spi-tx-bus-width = <2>;
|
|
spi-rx-bus-width = <2>;
|
|
reg = <0>;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
partition@0 {
|
|
label = "cfe";
|
|
reg = <0x000000 0x010000>;
|
|
read-only;
|
|
|
|
nvmem-layout {
|
|
compatible = "fixed-layout";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
macaddr_cfe_6a0: macaddr@6a0 {
|
|
compatible = "mac-base";
|
|
reg = <0x6a0 0x6>;
|
|
#nvmem-cell-cells = <1>;
|
|
};
|
|
};
|
|
};
|
|
|
|
partition@10000 {
|
|
compatible = "brcm,bcm963xx-imagetag";
|
|
label = "firmware";
|
|
reg = <0x010000 0x7e0000>;
|
|
};
|
|
|
|
partition@7f0000 {
|
|
label = "nvram";
|
|
reg = <0x7f0000 0x010000>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&leds {
|
|
status = "okay";
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_ephy0_act_led &pinctrl_ephy1_act_led
|
|
&pinctrl_ephy2_act_led &pinctrl_ephy3_act_led
|
|
&pinctrl_leds>;
|
|
|
|
led_upgrade_green: led@1 {
|
|
reg = <1>;
|
|
label = "green:upgrade";
|
|
};
|
|
|
|
led@6 {
|
|
reg = <6>;
|
|
active-low;
|
|
function = LED_FUNCTION_WAN;
|
|
color = <LED_COLOR_ID_GREEN>;
|
|
};
|
|
|
|
led@7 {
|
|
reg = <7>;
|
|
active-low;
|
|
label = "green:wifi";
|
|
};
|
|
};
|
|
|
|
&ohci {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie {
|
|
status = "okay";
|
|
};
|
|
|
|
&pinctrl {
|
|
pinctrl_leds: leds {
|
|
function = "led";
|
|
pins = "gpio1", "gpio6", "gpio7";
|
|
};
|
|
};
|
|
|
|
&switch0 {
|
|
ports {
|
|
port@0 {
|
|
reg = <0>;
|
|
label = "lan1";
|
|
|
|
phy-handle = <&phy1>;
|
|
phy-mode = "mii";
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
label = "lan2";
|
|
|
|
phy-handle = <&phy2>;
|
|
phy-mode = "mii";
|
|
};
|
|
|
|
port@2 {
|
|
reg = <2>;
|
|
label = "lan3";
|
|
|
|
phy-handle = <&phy3>;
|
|
phy-mode = "mii";
|
|
};
|
|
|
|
port@3 {
|
|
reg = <3>;
|
|
label = "wan";
|
|
|
|
phy-handle = <&phy4>;
|
|
phy-mode = "mii";
|
|
};
|
|
};
|
|
};
|
|
|
|
&uart0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbh {
|
|
status = "okay";
|
|
};
|