openwrt/package/boot/uboot-mediatek/patches/002-0025-clk-mediatek-add-CLK_XTAL-support-for-clock-driver.patch
Daniel Golle 0ea329fec4 uboot-mediatek: replace patches with updated versions
Weijie Gao has submitted an updated version of the patchset adding
support for MT7986 and MT7981 to U-Boot. Use that v2 patchset.

Changes of v2:
- Add cpu driver for print_cpuinfo()
- Fix NULL pointer dereference in mtk_image
  (was already fixed in OpenWrt)
- Fix coding style
- Minor changes

https://patchwork.ozlabs.org/project/uboot/list/?series=316148

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2022-08-31 14:02:45 +01:00

47 lines
1.4 KiB
Diff

From 0a2cd71e3b16eaa8797b5eec78356970186e552e Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Wed, 31 Aug 2022 19:05:11 +0800
Subject: [PATCH 25/32] clk: mediatek: add CLK_XTAL support for clock driver
This adds the CLK_XTAL macro/flag to allow modeling clocks which are
directly connected to the xtal clock.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
drivers/clk/mediatek/clk-mtk.c | 4 ++++
drivers/clk/mediatek/clk-mtk.h | 3 ++-
2 files changed, 6 insertions(+), 1 deletion(-)
--- a/drivers/clk/mediatek/clk-mtk.c
+++ b/drivers/clk/mediatek/clk-mtk.c
@@ -296,6 +296,7 @@ static ulong mtk_topckgen_get_factor_rat
rate = mtk_clk_find_parent_rate(clk, fdiv->parent, NULL);
break;
+ case CLK_PARENT_XTAL:
default:
rate = priv->tree->xtal_rate;
}
@@ -314,6 +315,9 @@ static ulong mtk_infrasys_get_factor_rat
rate = mtk_clk_find_parent_rate(clk, fdiv->parent,
priv->parent);
break;
+ case CLK_PARENT_XTAL:
+ rate = priv->tree->xtal_rate;
+ break;
default:
rate = mtk_clk_find_parent_rate(clk, fdiv->parent, NULL);
}
--- a/drivers/clk/mediatek/clk-mtk.h
+++ b/drivers/clk/mediatek/clk-mtk.h
@@ -29,7 +29,8 @@
#define CLK_PARENT_APMIXED BIT(4)
#define CLK_PARENT_TOPCKGEN BIT(5)
#define CLK_PARENT_INFRASYS BIT(6)
-#define CLK_PARENT_MASK GENMASK(6, 4)
+#define CLK_PARENT_XTAL BIT(7)
+#define CLK_PARENT_MASK GENMASK(7, 4)
#define ETHSYS_HIFSYS_RST_CTRL_OFS 0x34